What this PBI means?

[2838219522]

ufedor‌

I have a question.

In the AN5089.pdf.It said as below:

I shell with "md.b 60000000 80" in norflash bank0.display as below.

09 ee 02 00 60 10 00 00       I can understand this .Because location of u-boot in bank0 is at 0x60100000

I shell with "md.b 64000000 80" in norflash bank1.display as below.

09 ee 02 00 60 10 00 00       I can't understand this.The location of u-boot in bank1 is at 0x64100000.Why this PBI don't be 09 ee 02 00 64 10 00 00?

And it can boot from bank1 as well.

It's confused.

May I have your help,please?

[ufedor]

> The location of u-boot in bank1 is at 0x64100000.

The CPLD on the LS1021A-TWR board can be used to divide the NOR flash into two banks.

Please read the mentioned AN, 3 Copying the RCW and U-Boot into the upper bank.

[2838219522]

So ,you mean that the CPLD will map 0x64000000 and 0x64100000 to 0x60000000 and 0x60100000 when the board boots from bank1 .

[ufedor]

Yes.

[2838219522]

Thank you ,man.