To implement Read-While-Write (RWW) functionality on the LS1043A SoC ?

[lgx]

I need to implement Read-While-Write (RWW) functionality on the LS1043A SoC.

cs0 is the boot sNOR, works on XIP mode, cs1 is the data sNOR.

I find the similar implementation on MCU serial 

https://www.nxp.com.cn/docs/en/application-note/AN12564.pdf

Do we have the demo logic to implement RWW on ls1043a ?

[yipingwang]

I contacted the AE team, please refer to the following feedback from them.

In theory, RWW is supported, but we don't have such demo/case.

It becomes harder if it was used at boot stage because the qspi driver was initialized quite late.
On RT10xx board, there is uboot or other bootloader, so it is easier to implement it.

I am asking R&D team for help, will inform you if got any progress, but no guarantee to get the demo.

[lgx]

Thanks.
On ls1043a, it also run arm-trusted-firmware (atf) and then uboot. I think qspi could be configured during bl2 stage.

[yipingwang]

Yes, that means you need to implement the RWW in ATF stage. We don't have such demo for reference.

If you implement it in driver in kernel, then that would be easier. Please refer to arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi:
See attached. It supports 2 flash chip at the same time. select the chip by property: reg=0 and reg=2.