SERDES 3-taps equalization LX2160

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SERDES 3-taps equalization LX2160

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FRO
Contributor I

Dear,

I would like to perform a 3-tap equalization on SERDES 1 of LX2160 (lanes 4 to 7).

I write into register LNmTECRO at address 0x1ea0c30 (lane 4) to address 0x1ea0f30 (lane 7) the parameters (pre, post and main cursor) but nothing change on the signal (seen with an oscilloscope).

Is there an other register to write in to activate equalization ?

Thank you ! 

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FRO
Contributor I

1) SerDes 1 is 40G Ethernet

2) Lane 4, 5, 6 & 7, QCVS SerDes Validation Tool is not used (direct register programming by shell command)

3) Before modification, values are 0x20828700 (bit 32..0) (same value on all lanes)

After modification, values are 0x20828710 (EQ_AMP_RED set to 0.5)

What do you mean by "after exiting the test"? after a reboot? If it's the case, values are set to the same as before modification (0x20828700)

 

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ufedor
NXP TechSupport
NXP TechSupport

Let's continue in the Technical Case #00361573

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ufedor
NXP TechSupport
NXP TechSupport

1) Which SerDes1 protocol is configured?

2) How exactly lanes are tested? Is QCVS SerDes Validation Tool used?

3) What are values of LNmTECR0 before modification, after modification and after exiting the test?

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