Following are the queries on RCW based on the LS1043ARDB-PD reference board:
1. What is the value of C1_PLL_SEL in the RCW?
2. Is there any provision to set LVDD in the RCW similar to TVDD?
1) RCW from the QorIQ LS1043A Reference Design Board Getting Started Guide:
00000000: 08100010 0a000000 00000000 00000000
00000010: 14550002 80004012 e0025000 c1002000
00000020: 00000000 00000000 00000000 00038800
00000030: 00000000 00001101 00000096 00000001
C1_PLL_SEL = 0b0000
2) No.
Hi,
How does the processor know the voltage selected for LVDD.
LVDD is similar in logic like TVDD.
where, TVDD voltage level is informed to the processor through RCW settings.
So, will the processor respond without any issues if we change the voltage on LVDD from 1.8 V to 2.5 V rather than informing the processor to expect for 2.5V in LVDD.
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Thanks & Regards,
Akshay V
Hi,
Will the processor respond without any issues if we change the voltage on LVDD from 1.8 V to 2.5 V rather than informing the processor to expect for 2.5V in LVDD.
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Thanks & Regards,
Akshay V
You wrote:
> Is there any provision to set LVDD in the RCW similar to TVDD?
The answer was: "No."
Because LVDD-powered I/Os differ from TVDD-powered I/Os.