Need Help: LS1046ARDB - Tx Interrupt in IM mode

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Need Help: LS1046ARDB - Tx Interrupt in IM mode

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srak
Contributor III

In document, there is information about Rx interrupt (RxF Interrupt, RxBD busy Interrupt) but I could not find information on Tx interrupt. How to check for Tx complete event or Tx ready event?

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LFGP
NXP TechSupport
NXP TechSupport

unfortunately there is no dedicate interrupt to handle what you want,
please follow to the next link in order to get an idea to develop your own interrupt

https://developer.arm.com/documentation/den0024/a/AArch64-Exception-Handling/Interrupt-handling

 

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3,376件の閲覧回数
srak
Contributor III

You can use theBSYfield in theFMBM_TST—Tx Statusregister.

How to enable interrupt for this field? I could not find interrupt details in document.

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srak
Contributor III

Not using LPUART. I am using Ethernet - Independent mode. Any Tx interrupt available for Ethernet?

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LFGP
NXP TechSupport
NXP TechSupport

unfortunately there is no dedicate interrupt to handle what you want,
please follow to the next link in order to get an idea to develop your own interrupt

https://developer.arm.com/documentation/den0024/a/AArch64-Exception-Handling/Interrupt-handling

 

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3,408件の閲覧回数
LFGP
NXP TechSupport
NXP TechSupport

You can use the BSY field in the FMBM_TST—Tx Status register.

Please go to the section BMI Tx Port Registers in the LS1046 DPAA reference manual, page 552 

use the next link for the DPAA

https://www.nxp.com/products/processors-and-microcontrollers/arm-processors/layerscape-processors/la...

 

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3,445件の閲覧回数
LFGP
NXP TechSupport
NXP TechSupport

if you are using LPUART you can read the field TXEMPT in the LPUART FIFO Register.

Please go to the section 24.3.7 LPUART FIFO Register (LPUARTx_FIFO) in the reference manual to get more info about it.

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