Does U-Boot setup CCN508 and L3 cache?
I wonder because it does not seem that e.g. cluster 1 cores see RAM modifications of cluster 0 cores.
There is single initialization code for CCN in -boot. See attachment. This file is available using the following path:
packages/firmware/u-boot/arch/arm/cpu/armv8/fsl-layerscape
Have a great day,
Pavel Chubakov
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