LS2088A: Disabling DP-DDR

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LS2088A: Disabling DP-DDR

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ramasubramanian
Contributor II

Hello

We have custom hardware based on LS2088A.  We are not using AIOP interface.  Is that safe to disable DR-DDR?

Can we disable DP-DDR  and run MC on CPU DDR similar to that of LS2044A?

Regards

Rams

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yipingwang
NXP TechSupport
NXP TechSupport

Hello Rams,

It is possible to disable DP-DDR and run MC on CPU DDR on LS2088A custom board. Some other customers also use this method in their products design. Please refer to the following to do modification in software.

1. Please disable “CONFIG_SYS_FSL_HAS_DP_DDR” in uboot to skip the DP DDR controller initialization.

I assume that you use the latest LSDK, in arch/arm/cpu/armv8/fsl-layerscape/Kconfig of u-boot source, please comment "select SYS_FSL_HAS_DP_DDR" for ARCH_LS2080A.

2. Every time ldpaa_dpni_setup called dpni_get_attributes, it will pass a value and tell mc to write all attributes to address 0x6100690000, and if dpddr is not on board or dpddr is not initialized appropriately, mc will hang after access this memory. Please do the following modification, just add one line to clear dflt_dpni memroy after allocated with malloc, as below…

 

    dflt_dpni = (struct fsl_dpni_obj *)malloc(sizeof(struct fsl_dpni_obj));

 

    if (!dflt_dpni) {

 

        printf("No memory: malloc() failed\n");

 

        err = -ENOMEM;

 

        goto err_malloc;

 

     _memset(dflt_dpni, 0, sizeof(struct fsl_dpni_obj));

... ...


Have a great day,
TIC

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ramasubramanian
Contributor II

Hi,

Thanks for the response.  We will test and come back if we have any issues.

Regards

Rams

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