LS1046A boot from Invalid setting of SW5

[yenchao]

Hi,

I set RCW_SRC boot from sdcard and I got "boot from Invalid setting of SW5" message after setting RCW[IFC_GRP_E1_BASE]=1 & RCW[IFC_GRP_E1_EXT]=0

(Our QSPI_B_DATA[3] is not used, so I want to set it as GPIO output)

U-Boot 2021.04 (Mar 03 2023 - 14:18:15 +0800)

SoC:  LS1046AE Rev1.0 (0x87070010)
Clock Configuration:
       CPU0(A72):1800 MHz  CPU1(A72):1800 MHz  CPU2(A72):1800 MHz
       CPU3(A72):1800 MHz
       Bus:      600  MHz  DDR:      2100 MT/s  FMAN:     700  MHz
Reset Configuration Word (RCW):
       00000000: 0c150012 0e000000 00000000 00000000
       00000010: 11335577 40005012 60040000 c1000000
       00000020: 00200000 00000000 00000000 00238805
       00000030: 20104400 00023100 00000096 00000001
Model: LS1046A RDB Board
Board: LS1046ARDB, boot from Invalid setting of SW5
CPLD:  V0.0
PCBA:  V0.0

 Does anyone know how to fix this?

Thx

Yen

[yipingwang]

Please configure cfg_rcw_src on your target board as 0x40.

Please refer to the following source code in board/freescale/ls1046ardb/ls1046ardb.c

int checkboard(void)
{
static const char *freq[2] = {"100.00MHZ", "156.25MHZ"};
u8 cfg_rcw_src1, cfg_rcw_src2;
u16 cfg_rcw_src;
u8 sd1refclk_sel;

puts("Board: LS1046ARDB, boot from ");

cfg_rcw_src1 = CPLD_READ(cfg_rcw_src1);
cfg_rcw_src2 = CPLD_READ(cfg_rcw_src2);
cpld_rev_bit(&cfg_rcw_src1);
cfg_rcw_src=cfg_rcw_src1;
cfg_rcw_src=(cfg_rcw_src << 1) | cfg_rcw_src2;

if (cfg_rcw_src== 0x44)
printf("QSPI vBank %d\n", CPLD_READ(vbank));
else if (cfg_rcw_src== 0x40)
puts("SD\n");
else
puts("Invalid setting of SW5\n");

[yenchao]

Hi

Is these part of cfg_rcw_src?

RCW[IFC_GRP_E1_BASE]=1 & RCW[IFC_GRP_E1_EXT]=0

Thx

Yen

[yipingwang]

You need to modify the switch settings pins cfg_rcw_src[0:8] on your target board.

[yenchao]

Hi

Please see the test case I did.
case 1:
a.RCW[IFC_GRP_E1_BASE]=0 & RCW[IFC_GRP_E1_EXT]=1
b.DIP switch RCW_SRC[0:8]=0010_0000_0(boot from sd card)
It showed "boot from SD"

case 2:
a.RCW[IFC_GRP_E1_BASE]=1 & RCW[IFC_GRP_E1_EXT]=0
b.DIP switch RCW_SRC[0:8]=0010_0000_0(boot from sd card)
It showed "boot from Invalid setting of SW5"

My question is why I only changed RCW[IFC_GRP_E1_BASE] & RCW[IFC_GRP_E1_EXT] will show different message?

Thx
Yen

[yipingwang]

In the RCW configuration, please configure RCW[IFC_GRP_E1_EXT]=1

001 {IFC_CS_B[1]/GPIO2_10,
IFC_CS_B[2]/GPIO2_11,
QSPI_B_DATA[3]} 

A19 can be used as IFC_CS_B[1]/GPIO2_10 and A20 can be used as IFC_CS_B[2]/GPIO2_11

[yenchao]

Hi
If I set RCW[IFC_GRP_E1_BASE]=1 & RCW[IFC_GRP_E1_EXT]=1
It still showed "boot from Invalid setting of SW5"
Thx
Yen

[yenchao]

Hi

Any solution?

Thx

Yen

[yipingwang]

I also reproduced this issue on LS1046ARDB, I am discussing with the AE team, will update later.

[yipingwang]

As shown in the ls1046ardb.c file, to obtain the booting source, we read CPLD registers.
The signal named IFC_CS_B[3] has different signal functions, including QSPI_B_DATA[3], FTM7_EXT_CLK, IFC_CS_B[3], and GPIO2[12]. In the LS1046ARDB, signal IFC_CS_B[3] is connected to the CPLD. So when RCW[IFC_GRP_E1_BASE] is set to 1, IFC_CS_B[0:3] will act as GPIOs, and the CPLD will get disconnected. Since the CPLD is disconnected, we will receive no value from CPLD so it will print "Invalid setting of SW5".