Hello,
We are building a custom board and need a PCIe link (Gen1, 2.5Gbps)) which can support either PCIe x1 or PCIe x2.
From the LS1046A Reference Manual (rev.3, 08/2021), in Table 31-2, we can configure PCIe.3 x1 to use:
- SERDES C (RX2/TX2) with SRDS_PRTCL_S2= 5559, 0559 or 5A59
- SERDES C (RX3/TX3) with SRDS_PRTCL_S2= 5506, 0506 or 5A06
Which means that for a x1 Link, we can connect either C or D to lane 0 of the other device.
In PCIe x2, neither the other device nor the LS1046A supports lane reversal. In the LS1046ARM (section 25.6.1.2, Table 25.6 and below), it states that: "The x2 controller does not support lane reversal." and the table says that for x2 link Lane 0 is 0 and Lane 1 is 1.
So if we use SRDS_PRTCL_S2= 5577 for PCIe.3 x2, which of C or D is Lane 0 to be connected to the Lane 0 of the other device ?
