Dear folks,
There is a shared memory communication scenario between two Ls1046a boards. One acts as RC and the other acts as EP. The RC Ls1046a board will access four different parts of memory located in EP Ls1046a board. Can I just configure like this: 1 outbound window, 4 inbound windows. (the outbound window is big enough to cover the total size of the 4 inbound windows. Just like a PCI RC to access different BARs in the EP)? or I have to configure 1 outbound window with 1 inbound window (4 outbound windows are needed) ?
Thanks and Regards
Yun
Solved! Go to Solution.
1. Yes, it is necessary.
2. The ls1046a endpoint can response to the RC configuration once it's ready
Regards,
Bulat
It is up to you, either way can be used.
Regards,
Bulat
Hi Bulat,
Thank you for the quick response.
I have configuration questions about the Ls1046a target which acts as endpoint:
1. Is it necessary to set [CFG_READY] bit of PEX PFa Config Register (PEX_PF0_CONFIG) of Ls1046a endpoint before RC can configure it? (I did not find the related code in the linux driver code pcie-designware-ep.c)
2. Is it necessary to configure inbound window for the ls1046a endpoint to response CfgRd0 TLP from the RC? Or the ls1046a endpoint can response to the RC configuration once it's ready?
Thanks and Regards
Yun
1. Yes, it is necessary.
2. The ls1046a endpoint can response to the RC configuration once it's ready
Regards,
Bulat