The FRWY-LS1046A reference design manual states the use of DDR4-2133, however the datasheet provides a maximum of 2100MT/s.
Is the datasheet correct or the reference design?
2133 is a JEDEC standard and the 2100 is not.
If 2133 is not an option what is the guidance to use a part that is capable of 2133 at 2100?
First, there is no direct relationship between 2100 and 2133. The 2100 represents a DDR PLL:SYSCLK Ratio that is 21 times the system clock (sysclk). This field configures the ratio between the DDR PLL and the SYSCLK.
On the other hand, 2133 refers to the maximum frequency supported by the memory die. While 2100 and 2133 are close in value, they serve different purposes. Using memory dies rated at 2133MHz is generally the most economical choice.
JEDEC, on the other hand, does not directly correlate with these frequencies. We simply adhere to the JEDEC specifications, but the actual frequency can be configured through the sysclk in combination with the RCW (Reset Configuration Word) settings. This allows for flexibility in configuring the memory system to meet specific requirements while staying within the JEDEC-compliant range.
you can find the limit speed in Datasheet of LS1046A.
DDR Memory above 2100 could meet the 2100 Date Rate. QCVS_DDR_User_Guide would give you a guide to how to configure and validate the DDRs.
@June_Lu Thank you for your support.
The DDR_PLL configuration is setting the DDR rate clock I assume as the multiplier in RCW bits 10-15 are integer multipliers and would not be able to make 1050 which is the clock rate for 2100, is this assumption correct?
Also the ratio refers to the SYSCLK "DDRPLL:SYSCLK Ratio" is this nomenclature accurate if the DDRCLK input is used?
Hi June_Lu,
§15.2 from LS1046 Ref Manual says that 'The DDR controller is designed to support DDR4 SDRAMs that are compliant with JESD79-4A from November 2013'.
LS1046 is equipped with a MT40A5512M16JY-083E DDR from MICRON and is said to be 2133MT/s compliant.
If 2100 is really a limit for LS1046, isn't it due to PLL which is driven by a 100MHz oscillator and that can't be precisely set to obtain 2133 ?
Thx in advance for your precisions.
Hi june_Lu,
Thx for your answer and sorry to sollicitate you again. It seems to me that there are 2 questions pending:
1. If 2133 is not an option what is the guidance to use a part that is capable of 2133 at 2100?
2. If 2100 is really a limit for LS1046, isn't it due to PLL which is driven by a 100MHz oscillator and that can't be precisely set to obtain 2133 ?
I assume that when you write 'Yes, correct', you answer to the second one ?
The reference manual for the FRWY-LS1046A states 2133MT/s.
Please see the u-boot drop referencing 2133?
Is it possible that the 2.1GT/s was a rounding error in the datasheet?
JEDEC does not have a 2100, how should one use the tables provided by the memory device that has 2133 values?