LS1046 IFC configuration problem(ADM_SHFT) (plz help me)

[nekarose]

Hello, I am currently working with an LS1046 custom board. For the connection to the S29GL01GT flash memory, I connected IFC AD[0:15] to memory A[25:10], and IFC ADDR[16:25] to memory A[9:0]. Referring to the LS1046RM document, when accessing 16-bit flash memory, it recommends setting ADM_SHFT to 5 and treating line 26 as NC, which I followed in the design.

The issue is that after selecting cfg_rcw_src[6:7] as 10 in the initial RCW source value and booting with a 4-shift, I noticed that the LSB had ADDR[27] applied, and I confirmed that both AD and ADDR lines were shifted by 4. However, after booting, when I use T32 and apply Data.Set AD:0x1530130 %Long %BE 0x0000A00C to set ADM_SHFT = 5, the AD line shifts by 5, but the ADDR line does not change at all. To access line 25, I have to apply Data.set 60000000+0x04 %word, in order for a signal to be applied to line 25. This results in a situation where the lower 2 bits cannot be used.

1. Does this mean that after booting, when applying ADM_SHFT through the IFC register, the ADDR signals do not shift?
2. After booting, is there an additional procedure to apply CSOR[ADM_SHFT] in the IFC to make the ADDR line shift?

I am in a very urgent situation due to an important schedule. Please help me.

[June_Lu]

cfg_rcw_src[6:7]= 10, 10 Shift left by 4 to rather than 5.

Please refer to LS1046A Reference Manual, 22.4.1.2 Address/Data pin muxing for external address latch to get the ADM_SHFT in details.

Thanks

[June_Lu]

Maybe you could refer to LS1043ARDB schematics, page 4, U28 to check your design.

Thanks

[June_Lu]

From the LS1046A Reference Manual, page 142, Table 4-9. RCW source encodings, when booting cfg_rcw_src[6:7] could only be set to  4,7,10, do you want to set it to 5 in this step?

Please let me know you query if any misunderstand.

Thanks

[nekarose]

Thank you for your response. I would like to set ADM_SHFT to 5 for the NOR Flash memory used during the boot process. After considering this over the weekend, I believe that the ADM_SHFT applied during the initial boot is determined by RCW_SRC as 4, making it impossible to change. Would that be correct? If so:

1. Could the ADC_SHFT 5 setting be intended for an additional device (not the boot device)?
2. I am still confused about how ADM_SHFT works. When applied, it appears to only shift the AD lines, while the ADDR lines remain fixed. In such a case, the addresses wouldn’t be continuous. How should ADM_SHFT be used in this scenario?