LS1043A MAC-TO-MAC Connection internal RGMII delay

[timsalabim]

Dear NXP Support Team, 

I have a custumer which is using a LS1043A on a custom baseboard on one of the RGMII interfaces a FPGA is connected via a MAC-to-MAC connection.

Since I cannot find any information how to activate the RGMII delay in the LS1043A MAC,
I like to know if it is possible to set an internal RGMII delay if a MAC-to-MAC connection is used, or the delay has to done by a proper routing on the PCB. 

best regards 

[Hector_Villarruel]

Hello @timsalabim 

Hope this email finds you well,

You said on your last reply:

"Since I cannot find any information how to activate the RGMII delay in the LS1043A MAC,
I like to know if it is possible to set an internal RGMII delay if a MAC-to-MAC connection is used,".

"Proper operation of the RGMII bus requires careful control of the timing relationship between clock and data signals.

The LS1043A Data to clock input skew (at receiver) implies that PC board design will require clocks to be routed such that an additional trace delay of greater than 1.5 ns is added to the associated clock signal. Many PHY vendors already incorporate the necessary delay inside their device. If so, additional PCB delay is probably not needed.

Try to use via as less as possible on RGMII interface traces to minimize the timing skew. Keep RGMII interface traces less than 6 inches long, minimizing the interface timing skew.

It’s advised to keep the difference of the traces lengths less than 400 mils among the TX and the RX part. ".

I would also like to recommend you to check the  section "7.6.1.5.3 Time-Stamp Delays for Supported Mode" from the QorIQ LS1043A Data Path Acceleration Architecture (DPAA) Reference Manual, Rev. 0".

Have a great day.

BR,

Hector V

[Hector_Villarruel]

The LS1043A Data to clock input skew (at receiver) implies that PC board design will require clocks to be routed such that an additional trace delay of greater than 1.5 ns is added to the associated clock signal. Many PHY vendors already incorporate the necessary delay inside their device. If so, additional PCB delay is probably not needed.

Try to use via as less as possible on RGMII interface traces to minimize the timing skew. Keep RGMII interface traces less than 6 inches long, minimizing the interface timing skew.

It’s advised to keep the difference of the traces lengths less than 400 mils among the TX and the RX part. ".

I would also like to recommend you to check the  section "7.6.1.5.3 Time-Stamp Delays for Supported Mode" from the QorIQ LS1043A Data Path Acceleration Architecture (DPAA) Reference Manual, Rev. 0".

Have a great day.

BR,

Hector V

[timsalabim]

Hello Hector, 

thank you for the detailed reply it is very helpful in term of the hardware design, I'm interested in a software base solution since our customer missed to implement the RGMII delay on his PCB. 

Our customer has a MAC-to-MAC connection, on the remote device it is not possible to activate the RGMII delay so I'm wondering if this is possible in the LS10143A MAC.

In Linux device tree it is possible to add a the RGMII delay on the MAC with the "phy-mode" device tree properties "rx-internal-delay-ps" and "tx-internal-delay-ps". 

I need to know if these properties are supported by the LS1043A MAC.

https://www.kernel.org/doc/Documentation/devicetree/bindings/net/ethernet-controller.yaml

rx-internal-delay-ps:
          description:
            RGMII Receive Clock Delay defined in pico seconds. This is used for
            controllers that have configurable RX internal delays. If this
            property is present then the MAC applies the RX delay.
        tx-internal-delay-ps:
          description:
            RGMII Transmit Clock Delay defined in pico seconds. This is used for
            controllers that have configurable TX internal delays. If this
            property is present then the MAC applies the TX delay.

[Hector_Villarruel]

Hello @timsalabim 

Hope this post finds you well,

Unfortunately, from the sotfware side, it is not possible.

Thank you so much for your understading.

Have a great day!

BR,

Hector V