Boot sequence

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

Boot sequence

1,158 Views
notshure
Contributor IV

Hello everyone,
I'm working with the LS1043a board.
I wanted to know with you the procedure behind all the boot phase of the machine.

I have some uncertainties as to how this works.

Machine start-up procedure:

  • Power-on
  • The machine reads, via hardware (perhaps through a state machine?) some pins to figure out which memory to boot from ( are the pins of the IFC bus? )

  • Once the processor understand where to boot from, the processor go to read that memory (all always via hardware?)
    If we assume that my boot code resides in the NOR FLASH, does the processor, understanding that it must boot from that memory, read by itself at the right flash address nor via the IFC bus?
    Is all this done via hardware? or there is a micro code that makes the processor move up to this point.
  • From the memory it reads the PBL + RCW + PBI, are copied to RAM.
    The PBL code is executed.
    The PBL is a micro code that loads the contents of the RCW into the appropriate register of the processor and executes the PBI commands ?. That is, here things are done via SW?

 

  • Once the initial settings have been made,
    in the PBL code is defined where my machine must go to read to start u-boot or my operating system? So in the PBL is defined the address on which to go to read to load or the operatiove system or u-boot? for example it can be the address of another flash memory?

 

  • The processor reads the u-boot code from the second flash, different from the flash where the PBL resides, and copies it to RAM.

 

  • The processor executes the operating system code

 

is the procedure right?

0 Kudos
1 Reply

1,150 Views
r8070z
NXP Employee
NXP Employee

Initially, on power on reset cfg_rcw_src[0:n] configuration inputs are sampled to determine the the Reset Configuration Word (RCW) source. The pre-boot loader (PBL) starts loading the RCW data from the interface specified by the cfg_rcw_src[0:n] and stores that 64 bytes of data to the RCWSR registers within the device configuration block. The RCW defines the the pre-boot initialization source (PBI) sourse.
The PBL performs pre-boot initialization by reading data from either the eSDHC, QuadSPI, or IFC interface and writing to CCSR space or local memory space (OCRAM1 or OCRAM2, DDR). The PBI result defines what boot code will be executed by the core.

The Layerscape Software Development Kit User Guide describes the boot process in details in the Chapter 5 Bootloader:
https://docs.nxp.com/bundle/GUID-3FFCCD77-5220-414D-8664-09E6FB1B02C6/page/GUID-206D907C-E034-4A01-B...

0 Kudos