TDM Driver Working in Internal Loopback mode During Validation

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TDM Driver Working in Internal Loopback mode During Validation

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TDM Driver Working in Internal Loopback mode During Validation

This document introduces porting TDM Linux driver working in internal loopback mode to do verification during custom boards bringing up and verification stage.

1. TDM Interface Configuration to Support Internal Loopback Mode

2. Modify Linux Kernel Driver to Make TDM Working in Internal Loopback Mode

3. Build TDM Driver into Linux Kernel and do verification on the target board

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Hello Yiping,

I am using the P1020RDB-PD...

The TDM_TEST is working fine... but I have been fighting with TDM_LOOPBACK_TEST for a while...

The TDM loopback test is failing 95% of the time and even when it says that it is PASSed it is not really true

since the while loop within that code is written poorly where it can finish looping those 15 polls

without ever going thru compare of data, thus reporting PASSing results when indeed it is in fact FAILing...

I have noticed that TDM was written mostly around T1040RDB

Anyhow, I am glad that few days ago you have provided with some changes for P1010... to make TDM_LOOPBACK_TEST

work correctly on it... I cannot verify if it does or it doesn't,  since I do not have P1010

Supposedly  P1010 and P1020 are very close

I would be interested in specific changes for P1020RDB-PD to get the TDM_LOOPBACK_TEST working on it flawlessly ...

Can you provide additional changes specifically for P1020RDB-PD

Your help in this matter will be greatly appreciated...

Thanks,

Naum

In reference to  the TDM_LOOPBACK_TEST.c  within  TDM driver of SDK1.9

 

TDM_LOOPBACK_TEST is not dependable…

 

The way TDM_LOOPBACK_TEST.c  is written one is bound to get erroneous results claiming that this test is PASSing when indeed it does not… 

Since, if too many poll cycles where shortened by continue;  j variable might never get higher than BUF_COUNT which is equal 5 in which case tdm_check_data() never gets entered thus data is not compared and test returns PASSing results… If one will redefine POLL_COUNT to be 60 or higher I assure you that you will see this test FAILing every time…

 

#define POLL_COUNT         15

#define BUF_COUNT          5

static int poll_count = POLL_COUNT;

...

int poll = 0;

...

while ( ( poll < poll_count ) && !kthread_should_stop() )

   {

   poll++;

   ret = tdm_ch_poll( h_channel1, 10 );

     

   if ( ret != TDM_E_OK )

      continue;

   ...

   ...

   if ( ++j >= BUF_COUNT )

      error_count += tdm_check_data( tx_data[ ( index + 1 ) % BUF_COUNT ], rx_data[ index ] );

 

  index++;

  index = index % BUF_COUNT;

  }

 

...

if ( ( error_count == 0 ) && ( j != 0 ) )

   pr_info( "%s TDM loopback test PASSED!\n", in_loopback ? "Internal" : "External" );

else

   pr_info( "%s TDM loopback test FAILED!\n", in_loopback ? "Internal" : "External" );

 

 

Yiping,

Please encrease the POLL_COUNT to 60 and run this test on P1020RDB-PD...

Can you run it 20 times with PASSing results?

I bet you will see the issue right away...

 

Thanks

Naum

Has anybody else been able to run TDM_LOOPBACK_TEST on P1020RDB-PD with no issues...???

Hello Naum Grutman,

I have tested TDM internal loopback on P1020RDB-PD previously, please refer to the attachment.

I will attach the result for P1020RDB.

I will do more verification according to your comment and provide the feedback. Thanks.

Thanks,

Yiping

Hello Yiping,

Thanks for responding to my concern…

Again let me reemphasize my point…:

If you just run the TDM_LOOPBACK_TEST even with your changes within TDM_FSL.C

#define TDM_CLK_DIV_VAL 0xC3

etc… etc… etc…

The issue is the algorithm within while() loop within TDM_LOOPBACK_TEST.C

while ((poll < poll_count) && !kthread_should_stop()) {

poll++;

ret = tdm_ch_poll(h_channel1, 10);

if (ret != TDM_E_OK)

continue; <<<<<<<<<<<<<<<<<<<<<<<<<<<==== if 11+ unsuccessfull tdm_ch_poll()

poll cycles will go back to top of while()

via this continue

j variable will have no opportunity to be greater

than BUF_COUNT = 5 since poll_count = 15

thus data is not gonna get compared and

you gonna get out of this while() reporting that

test PASSed when data was never compared…

for (i = 0; i < TDM_FRAME_LENGTH; i++)

tx_data[index][i] = j*TDM_FRAME_LENGTH + i;

ret = tdm_channel_write(h_port, h_channel1, tx_data[index],

size);

if (ret != TDM_E_OK)

pr_info("Error in tdm_channel_write\n");

ret = tdm_channel_read(h_port, h_channel1, rx_data[index],

&size);

if (ret != TDM_E_OK)

pr_info("Error in tdm_channel_read\n");

/*

  • There is a delay of 6 frame between transmitted data and

  • received data. Hence we compare tx_data[0] with rx data[6]

  • and so on

*/

if (++j >= BUF_COUNT)

error_count += tdm_check_data(tx_data[(index + 1)

%BUF_COUNT], rx_data[index]);

index++;

index = index%BUF_COUNT;

}

pr_info("TDM Loppback test completed.\n");

if ((error_count == 0) && (j != 0)) <<<<<<<<<<<<<<==== here j should be compared to BUF_COUNT

if j never got >= BUF_COUNT

tdm_check_data() would not be called

and resulting PASSing statement would be erroneous…

pr_info("%s TDM loopback test PASSED!\n", in_loopback ?

"Internal" : "External");

else

pr_info("%s TDM loopback test FAILED!\n", in_loopback ?

"Internal" : "External");

If you increase POLL_COUNT to some high number this will give plenty of opportunity for

j variable to become greater than BUF_COUNT and tdm_check_data() will have plenty of opportunities to get called…

then you will see this test failing every time…

<http://www.rugged.com/>

Naum Grutman

Tel: ( 818 ) 700-2000 Ext. 163

Fax: ( 818 ) 407-1502

Address: 19756 Prairie St. Chatsworth, CA.91311

E-mail: ngrutman@rugged.com<mailto:ngrutman@rugged.com>

Website: www.rugged.com<http://www.rugged.com/>;

Embedded Computing without Compromise

Yiping,

Here is the proof of what I am claiming all along…

Same test is being run every time after power cycle…

It may arbitrarily PASS or FAIL depending on how many

continue; statements the while loop was forced to use…

Switching control for channel 1 is 20

Operating Fun for channel 2 is a0

Cadence Timer Reg for CH2 before is 7 ff0 0

Cadence Timer Reg for CH2 after is 1 903 20

Switching control for channel 2 is 20

SLIC 2 configuration success

TDM LOOPBACK TEST:

TDM Driver(ID=1)is attached with Adapterfsl_tdm(ID = 0) drv_count=1

TDM LOOPBACK TEST module installed

hub 1-1:1.0: USB hub found

hub 1-1:1.0: 4 ports detected

usbcore: registered new interface driver usbhid

usbhid: USB HID core driver

snd-soc-p1022ds: missing/invalid global utils node

ipip: IPv4 over IPv4 tunneling driver

TCP: cubic registered

Initializing XFRM netlink socket

NET: Registered protocol family 10

sit: IPv6 over IPv4 tunneling driver

NET: Registered protocol family 17

NET: Registered protocol family 15

Key type dns_resolver registered

/home/ngrutman/QorIQ-SDK-V1.9-20151210-yocto/build_p1020rdb/tmp/work-shared/p1020rdb/kernel-source/drivers/rtc/hctosys.c: unable to open rtc device (rtc0)

snd-soc-p1022rdk: missing/invalid global utils node

ALSA device list:

No soundcards found.

TDM Loopback test completed... continued=11 and j=4

Internal TDM loopback test PASSED!

ata1: SATA link up 3.0 Gbps (SStatus 123 SControl 0)

ata1.00: ATA-8: WDC WD3200BEKT-60PVMR0, 01.01A01, max UDMA/133

ata1.00: 625142448 sectors, multi 0: LBA48 NCQ (depth 31/32)

ata1.00: configured for UDMA/100

scsi 0:0:0:0: Direct-Access ATA WDC WD3200BEKT-6 01.0 PQ: 0 ANSI: 5

sd 0:0:0:0: 625142448 512-byte logical blocks: (320 GB/298 GiB)

sd 0:0:0:0: 4096-byte physical blocks

sd 0:0:0:0: Attached scsi generic sg0 type 0

sd 0:0:0:0: Write Protect is off

sd 0:0:0:0: Write cache: enabled, read cache: enabled, doesn't support DPO or FUA

sda: sda1 sda2 sda3 sda4

...

...

...

Switching control for channel 2 is 20

SLIC 2 configuration success

TDM LOOPBACK TEST:

TDM Driver(ID=1)is attached with Adapterfsl_tdm(ID = 0) drv_count=1

TDM LOOPBACK TEST module installed

usbcore: registered new interface driver usbhid

usbhid: USB HID core driver

snd-soc-p1022ds: missing/invalid global utils node

ipip: IPv4 over IPv4 tunneling driver

TCP: cubic registered

hub 1-1:1.0: USB hub found

hub 1-1:1.0: 4 ports detected

Initializing XFRM netlink socket

NET: Registered protocol family 10

sit: IPv6 over IPv4 tunneling driver

NET: Registered protocol family 17

NET: Registered protocol family 15

Key type dns_resolver registered

/home/ngrutman/QorIQ-SDK-V1.9-20151210-yocto/build_p1020rdb/tmp/work-shared/p1020rdb/kernel-source/drivers/rtc/hctosys.c: unable to open rtc device (rtc0)

snd-soc-p1022rdk: missing/invalid global utils node

ALSA device list:

No soundcards found.

TX and RX buffer do NOT match. Err_count:79

TDM Loopback test completed... continued=10 and j=5

Internal TDM loopback test FAILED!

ata1: SATA link up 3.0 Gbps (SStatus 123 SControl 0)

ata1.00: ATA-8: WDC WD3200BEKT-60PVMR0, 01.01A01, max UDMA/133

ata1.00: 625142448 sectors, multi 0: LBA48 NCQ (depth 31/32)

ata1.00: configured for UDMA/100

scsi 0:0:0:0: Direct-Access ATA WDC WD3200BEKT-6 01.0 PQ: 0 ANSI: 5

sd 0:0:0:0: 625142448 512-byte logical blocks: (320 GB/298 GiB)

sd 0:0:0:0: 4096-byte physical blocks

sd 0:0:0:0: Attached scsi generic sg0 type 0

sd 0:0:0:0: Write Protect is off

<http://www.rugged.com/>

Naum Grutman

Tel: ( 818 ) 700-2000 Ext. 163

Fax: ( 818 ) 407-1502

Address: 19756 Prairie St. Chatsworth, CA.91311

E-mail: ngrutman@rugged.com<mailto:ngrutman@rugged.com>

Website: www.rugged.com<http://www.rugged.com/>;

Embedded Computing without Compromise

Yiping,

Here is the proof of what I am claiming all along…

Same test is being run every time after power cycle…

It may arbitrarily PASS or FAIL depending on how many

continue; statements the while loop was forced to use…

 

 

Switching control for channel 1 is 20

Operating Fun for channel 2 is a0

Cadence Timer Reg for CH2 before is 7 ff0 0

Cadence Timer Reg for CH2 after is 1 903 20

Switching control for channel 2 is 20

SLIC 2 configuration success

TDM LOOPBACK TEST:

TDM Driver(ID=1)is attached with Adapterfsl_tdm(ID = 0) drv_count=1

TDM LOOPBACK TEST module installed

hub 1-1:1.0: USB hub found

hub 1-1:1.0: 4 ports detected

usbcore: registered new interface driver usbhid

usbhid: USB HID core driver

snd-soc-p1022ds: missing/invalid global utils node

ipip: IPv4 over IPv4 tunneling driver

TCP: cubic registered

Initializing XFRM netlink socket

NET: Registered protocol family 10

sit: IPv6 over IPv4 tunneling driver

NET: Registered protocol family 17

NET: Registered protocol family 15

Key type dns_resolver registered

/home/ngrutman/QorIQ-SDK-V1.9-20151210-yocto/build_p1020rdb/tmp/work-shared/p1020rdb/kernel-source/drivers/rtc/hctosys.c: unable to open rtc device (rtc0)

snd-soc-p1022rdk: missing/invalid global utils node

ALSA device list:

  No soundcards found.

TDM Loopback test completed... continued=11 and j=4

Internal TDM loopback test PASSED!

ata1: SATA link up 3.0 Gbps (SStatus 123 SControl 0)

ata1.00: ATA-8: WDC WD3200BEKT-60PVMR0, 01.01A01, max UDMA/133

ata1.00: 625142448 sectors, multi 0: LBA48 NCQ (depth 31/32)

ata1.00: configured for UDMA/100

scsi 0:0:0:0: Direct-Access     ATA      WDC WD3200BEKT-6 01.0 PQ: 0 ANSI: 5

sd 0:0:0:0: [sda] 625142448 512-byte logical blocks: (320 GB/298 GiB)

sd 0:0:0:0: [sda] 4096-byte physical blocks

sd 0:0:0:0: Attached scsi generic sg0 type 0

sd 0:0:0:0: [sda] Write Protect is off

sd 0:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA

 sda: sda1 sda2 sda3 sda4

 

...

...

...

 

Switching control for channel 2 is 20

SLIC 2 configuration success

TDM LOOPBACK TEST:

TDM Driver(ID=1)is attached with Adapterfsl_tdm(ID = 0) drv_count=1

TDM LOOPBACK TEST module installed

usbcore: registered new interface driver usbhid

usbhid: USB HID core driver

snd-soc-p1022ds: missing/invalid global utils node

ipip: IPv4 over IPv4 tunneling driver

TCP: cubic registered

hub 1-1:1.0: USB hub found

hub 1-1:1.0: 4 ports detected

Initializing XFRM netlink socket

NET: Registered protocol family 10

sit: IPv6 over IPv4 tunneling driver

NET: Registered protocol family 17

NET: Registered protocol family 15

Key type dns_resolver registered

/home/ngrutman/QorIQ-SDK-V1.9-20151210-yocto/build_p1020rdb/tmp/work-shared/p1020rdb/kernel-source/drivers/rtc/hctosys.c: unable to open rtc device (rtc0)

snd-soc-p1022rdk: missing/invalid global utils node

ALSA device list:

  No soundcards found.

TX and RX buffer do NOT match. Err_count:79

TDM Loopback test completed... continued=10 and j=5

Internal TDM loopback test FAILED!

ata1: SATA link up 3.0 Gbps (SStatus 123 SControl 0)

ata1.00: ATA-8: WDC WD3200BEKT-60PVMR0, 01.01A01, max UDMA/133

ata1.00: 625142448 sectors, multi 0: LBA48 NCQ (depth 31/32)

ata1.00: configured for UDMA/100

scsi 0:0:0:0: Direct-Access     ATA      WDC WD3200BEKT-6 01.0 PQ: 0 ANSI: 5

sd 0:0:0:0: [sda] 625142448 512-byte logical blocks: (320 GB/298 GiB)

sd 0:0:0:0: [sda] 4096-byte physical blocks

sd 0:0:0:0: Attached scsi generic sg0 type 0

sd 0:0:0:0: [sda] Write Protect is off

 

By the way...  here is that code with an extra variable that produced above results...

   while ( ( poll < poll_count ) && !kthread_should_stop() )

      {

      poll++;

      ret = tdm_ch_poll( h_channel1, 10 );

     

      if ( ret != TDM_E_OK )

         {        

         ++continued;

         continue;

         }

     

      for ( i = 0; i < TDM_FRAME_LENGTH; i++ )

         tx_data[ index ][ i ] = j * TDM_FRAME_LENGTH + i;

 

      ret = tdm_channel_write( h_port, h_channel1, tx_data[ index ], size );

      if ( ret != TDM_E_OK )

         pr_info( "Error in tdm_channel_write\n" );

     

      ret = tdm_channel_read( h_port, h_channel1, rx_data[ index ], &size );

      if ( ret != TDM_E_OK )

         pr_info( "Error in tdm_channel_read\n" );

 

      /*

       * There is a delay of 6 frame  between transmitted data and

       * received data. Hence we compare tx_data[0] with rx data[6]

       * and so on

       */

      if ( ++j >= BUF_COUNT )

         error_count += tdm_check_data(tx_data[(index + 1)

                        %BUF_COUNT], rx_data[index]);

 

      index++;

      index = index % BUF_COUNT;

      }

 

   pr_info( "TDM Loopback test completed... continued=%d and j=%d\n", continued, j );

 

   if ( ( error_count == 0 ) && ( j != 0 ) )

      pr_info( "%s TDM loopback test PASSED!\n", in_loopback ? "Internal" : "External" );

   else

      pr_info( "%s TDM loopback test FAILED!\n", in_loopback ? "Internal" : "External" );

Hi Yiping,

Any news/improvments on the subject of  TDM_LOOPBACK_TEST...???

Thanks,

Naum

Hi Naum,

Sorry for the delay, Yiping was occupied by some issue these days so she didn't answer.

I sent message to her today, she says she is now investigating your question with high priority and will answer you as soon as she gets the answer.

Thanks for your patience.

Jennie

Hello Naum,

After increase POLL_COUNT and modify the source code as the following, indeed the test failed.

 if (++j >= 1)
  error_count += tdm_check_data(tx_data[(index + 1) %BUF_COUNT], rx_data[index]);

After enable DEBUG option, I found the Rx and Tx data in some Iterations matched, in some iterations failed, I am still doing investigation to find out the reason.

Thanks,

Yiping

Hello Naum Grutman,

Please refer to my latest update for the source file tdm_loopback_test.c.

In the original test program, it use 6 frames delay between tx and rx, in fact this is inaccurate, I tried many tests, and found it would be difficult to decide the delay between tx and rx, rx side often receives the original data in the assigned time slot of the channel.

I modified the test program to define an identifier for each frame, and make rx side continuously receiving from the channel until the desired frame is coming.

I add 100ms delay between tx and rx, you also could remove it, but many "No available data" messages from channel would be printed in the console.

The attached log for P1010 is 60 times poll without time delay, P1020RDB log is 60 times poll with 100ms delay between tx and rx.

Thanks,

Yiping

Hello Yiping,

I was able to run your modified tdm_loopback_test and it is PASSing all 60 iterations...

Let me take it from here an analyse it further... I need to check that my other tests did not get affected...

Meanwhile thanks for your  attention to this matter...

Naum

 

Hello Yiping,

 

This file: “TDM Driver Working in Internal Loopback mode During Validation.pdf”

that you have put together back in November has references

to various TDM Registers and their field descriptions

as shown below… that looks to me that you pulled from some other

manual that has this information

 

I have the following document:

P1020 QorIQ Integrated Processor

Reference Manual

Supports: P1020 and P1011

Document Number: P1020RM

Rev. 6, 01/2013

that has some of the information that is matching yours

but some of the information is missing…

like these fields: TDM_CLOCK_TDMCLK_DIV_VAL_RX   TDM_CLOCK_TDMCLK_DIV_VAL_TX

 TDMCLK_DIV_VAL_TX.jpg

 TDMCLK_DIV_VAL_RX.jpg

 

Plus explanation how to figure out the divider

I need to have a divider to get the TDM @10Mhz for P1020RDB

 

 

I would like to have the Original Manual that contains

ALL of the TDM registers with their field descriptions for P1020RDB

 

Can you provide such manual

 

Thanks,

Naum

 FromYourPDF.jpg

 

 

Please refer to P1010 Reference Manual from QorIQ® P1010 and P1014 Low-Power Communications Processors with Trust Architecture|NXP .

Thanks,

Yiping

Hello Yiping,

I am using P1020RDB-PD

the TDM_TEST.c  with the DTMF loopback and TDM_LOOPBACK_TEST.c are performing OK

as long as I am using the external clock...

if I use within TDM_FSL.c the following line

      dev_node = of_find_compatible_node( NULL, NULL, "fsl,P1020RDB-PD" );

instead of yours

      dev_node = of_find_compatible_node(NULL, NULL, "fsl,P1010RDB-PB");

to force P1020 to use internal clock... then both of above tests are FAILing...

I have tried these test with each of the below values with not much luck...

#define TDM_CLK_DIV_VAL 0x85

#define TDM_CLK_DIV_VAL 0xC3 

Can you please run above tests on P1020RDB-PD using internal clock

and let me know what TDM_CLK_DIV_VAL should be set to...

Thanks,

Naum

Yiping,

Furthermore, to add to my question/statement few minutes ago...

Looking/reviewing again the test logs/results that you performed back in January using P1010 show that you were using

external clock... I would like to see you rerun your tests using internal clock on P1010 and see that you a get positive results...

Since you were using external clock the value of 0xC3 was not even used...

Thanks again,

Naum

Hello Naum,

Would you please create a new thread in the community to discuss about your new questions?

Because this document page is updated too long.

Thanks,

Yiping

Hello Yiping,

Per you request I have started a brand new thread within NXP Community:

P1020RDB-PD TDM tests and issues

https://community.nxp.com/message/880403

Please review my findings and let me know of your progress…

Thanks,

<http://www.rugged.com/>

Naum Grutman

Tel: ( 818 ) 700-2000 Ext. 163

Fax: ( 818 ) 407-1502

Address: 19756 Prairie St. Chatsworth, CA.91311

E-mail: ngrutman@rugged.com<mailto:ngrutman@rugged.com>

Website: www.rugged.com<http://www.rugged.com/>;

Embedded Computing without Compromise

I have reported an additional issue back on Feb 21st into this thread:

https://community.nxp.com/docs/DOC-333351

TDM Driver Working in Internal Loopback mode During Validation 

since the issue is related and is on the same subject etc... etc...

but I have been asked to create a new thread... so I have done that...

P1020RDB-PD TDM tests and issues 

Would anybody please look into this issue...

Thanks,

Naum

Both TDM_TEST and  TDM_LOOPBACK_TEST are FAILing when using INTERNAL CLOCK !!!

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‎11-23-2016 01:05 AM
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