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error HardFault_Handler gets generated while reading in UART from hyperlterminal

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error HardFault_Handler gets generated while reading in UART from hyperlterminal

‎06-15-2016 06:28 PM
1,836 Views
lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by researchinnovation on Tue Dec 18 00:01:52 MST 2012
Hi...!!!


I am using LPC1114/301 and using MAX232 chip with RX,TX,CTS ,RTS and GND connection.
Why this Interrupt Error is happening whenever it reaches to      SystemInit(); and I try to give data from hyper terminal.
//*****************************************************************************
//
// This is the code that gets called when the processor receives a fault
// interrupt.  This simply enters an infinite loop, preserving the system state
// for examination by a debugger.
//
//*****************************************************************************
void HardFault_Handler(void)
{

    // Enter an infinite loop.

    while(1)
    {
    }
}
Whenever I tried to give some data from hyperterminal this hits the interrupt error HardFault_Handler.

#include "driver_config.h"
#include "target_config.h"

#include "gpio.h"
#include "timer32.h"
#include "ssp.h"


#include "uart.h"


extern volatile uint32_t UARTCount;
extern volatile uint8_t UARTBuffer[BUFSIZE];
extern volatile uint8_t UARTBuffer1[BUFSIZE];
uint8_t i=0;
uint16_t buff[] = {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0};

int casse;
int cnt;
int cont = 0;
int cont1=0;
int cont2 = 0;

int main (void) {
      /* Basic chip initialization is taken care of in SystemInit() called
       * from the startup code. SystemInit() and chip settings are defined
       * in the CMSIS system_<part family>.c file.
       */
     SystemInit();
  /* NVIC is installed inside UARTInit file. */
  UARTInit(UART_BAUD);

 // for(cont1=0; cont1<30000; cont1++)
  //{
    //cont1++;
 // }

    SSP_IOConfig( 0 );    /* initialize SSP port, share pins with SPI1
                          on port2(p2.0-3). */
    //SSP_Init( SSP_NUM );
    //GPIOSetDir(PORT0,2,0);
    LPC_IOCON ->PIO0_8           &= ~0x07;    /*  SSP I/O config */
    LPC_IOCON->PIO0_8           |= 0x01;        /* SSP MISO */
    LPC_IOCON->PIO0_9           &= ~0x07;
    LPC_IOCON->PIO0_9           |= 0x01;
    LPC_IOCON->SCK_LOC = 0x02;
    LPC_IOCON->PIO0_6 = 0x02;
    LPC_IOCON->PIO0_2 &= ~0x07;
    LPC_IOCON->PIO0_2 |= 0x01;

    if ( LPC_SSP0->CR1 & SSPCR1_SSE )
      {
        /* The slave bit can't be set until SSE bit is zero. */
          LPC_SSP0->CR1 &= ~SSPCR1_SSE;
      }
        LPC_SSP0->CR1 = SSPCR1_MS;        /* Enable slave bit first */
        LPC_SSP0->CR1 |= SSPCR1_SSE;

    LPC_SSP0->CR0 = 0x04CF;
    LPC_SSP0 ->CR1 = 0x06;


        while(1)
        {
            while ( !(LPC_SSP0->SR & SSPSR_RNE) );
            {//printf(" I am in buff loop buff");
             buff = (uint16_t)LPC_SSP0->DR;
                   i++;
                   if(buff == 0x0400)
                   {
                       while ( (LPC_SSP0->SR & (SSPSR_TNF|SSPSR_BSY)) != SSPSR_TNF );
                           LPC_SSP0->DR = 0x4567;
                   }
            }

        }
return 0;


}
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‎06-15-2016 06:28 PM
1,721 Views
lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by graynomad on Tue Dec 18 22:07:01 MST 2012
[FONT=Times New Roman][SIZE=3]You obviously have not implemented that procedure or you would be single stepping through a function called [/SIZE][/FONT][FONT=Times New Roman][SIZE=3]HardFault_HandlerAsm() and then HardFault_HandlerC()[SIZE=3] and no[SIZE=3]t [/SIZE]the [SIZE=3]default handler.[/SIZE][/SIZE]

In the C handler part you step down until the variable [/SIZE][/FONT][FONT=Times New Roman][SIZE=3]stacked_lr has been loaded and look at the value.

Certainly that's how I've got the details before.
[/SIZE][/FONT]
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‎06-15-2016 06:28 PM
1,721 Views
lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by researchinnovation on Tue Dec 18 21:29:36 MST 2012
Quote: graynomad
If you implement the advice here

http://support.code-red-tech.com/CodeRedWiki/DebugHardFault

You should be able to see where the fault occurred, I think you see the address in the LR register.

Hi...!!!

Check this image.
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‎06-15-2016 06:28 PM
1,721 Views
lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by graynomad on Tue Dec 18 01:24:20 MST 2012
If you implement the advice here

http://support.code-red-tech.com/CodeRedWiki/DebugHardFault

You should be able to see where the fault occurred, I think you see the address in the LR register.
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‎06-15-2016 06:28 PM
1,721 Views
lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by researchinnovation on Tue Dec 18 00:26:41 MST 2012
Quote: researchinnovation
Hi...!!!

I am using LPC1114/301 and using MAX232 chip with RX,TX,CTS ,RTS and GND connection.
Why this Interrupt Error is happening whenever it reaches to      SystemInit(); and I try to give data from hyper terminal.
//*****************************************************************************
//
// This is the code that gets called when the processor receives a fault
// interrupt.  This simply enters an infinite loop, preserving the system state
// for examination by a debugger.
//
//*****************************************************************************
void HardFault_Handler(void)
{

    // Enter an infinite loop.

    while(1)
    {
    }
}
Whenever I tried to give some data from hyperterminal this hits the interrupt error HardFault_Handler.

#include "driver_config.h"
#include "target_config.h"

#include "gpio.h"
#include "timer32.h"
#include "ssp.h"


#include "uart.h"


extern volatile uint32_t UARTCount;
extern volatile uint8_t UARTBuffer[BUFSIZE];
extern volatile uint8_t UARTBuffer1[BUFSIZE];
uint8_t i=0;
uint16_t buff[] = {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0};

int casse;
int cnt;
int cont = 0;
int cont1=0;
int cont2 = 0;

int main (void) {
      /* Basic chip initialization is taken care of in SystemInit() called
       * from the startup code. SystemInit() and chip settings are defined
       * in the CMSIS system_<part family>.c file.
       */
     SystemInit();
  /* NVIC is installed inside UARTInit file. */
  UARTInit(UART_BAUD);

 // for(cont1=0; cont1<30000; cont1++)
  //{
    //cont1++;
 // }

    SSP_IOConfig( 0 );    /* initialize SSP port, share pins with SPI1
                          on port2(p2.0-3). */
    //SSP_Init( SSP_NUM );
    //GPIOSetDir(PORT0,2,0);
    LPC_IOCON ->PIO0_8           &= ~0x07;    /*  SSP I/O config */
    LPC_IOCON->PIO0_8           |= 0x01;        /* SSP MISO */
    LPC_IOCON->PIO0_9           &= ~0x07;
    LPC_IOCON->PIO0_9           |= 0x01;
    LPC_IOCON->SCK_LOC = 0x02;
    LPC_IOCON->PIO0_6 = 0x02;
    LPC_IOCON->PIO0_2 &= ~0x07;
    LPC_IOCON->PIO0_2 |= 0x01;

    if ( LPC_SSP0->CR1 & SSPCR1_SSE )
      {
        /* The slave bit can't be set until SSE bit is zero. */
          LPC_SSP0->CR1 &= ~SSPCR1_SSE;
      }
        LPC_SSP0->CR1 = SSPCR1_MS;        /* Enable slave bit first */
        LPC_SSP0->CR1 |= SSPCR1_SSE;

    LPC_SSP0->CR0 = 0x04CF;
    LPC_SSP0 ->CR1 = 0x06;


        while(1)
        {
            while ( !(LPC_SSP0->SR & SSPSR_RNE) );
            {//printf(" I am in buff loop buff");
             buff = (uint16_t)LPC_SSP0->DR;
                   i++;
                   if(buff == 0x0400)
                   {
                       while ( (LPC_SSP0->SR & (SSPSR_TNF|SSPSR_BSY)) != SSPSR_TNF );
                           LPC_SSP0->DR = 0x4567;
                   }
            }

        }
return 0;


}

I checked with the following aspects also but it is not working :

[B]Hard Fault Handler Usage[/B]
 The big thing the above handler gives you is the program counter,  which is the address where the processor was executing when the hard  fault occurred. You can then look at your listing file (or map file) to  see what function and instruction that was. Also useful is LR the Link  Register, which contains the return address of the last function call &#8211;  it can show you where you came from to get to this point.
 A few tips.
 The typical reason for a hardfault is actually a bus error (which was  promoted to a hard fault), because software tried to access an invalid  region of memory. There are a couple of common ways of doing this.
 One is a bad pointer. It might be uninitialised, or not properly bounded (you ran off the end of an array for example).
 Another, more subtle, way of getting a bad pointer is by being sloppy  with the scope of variables. This is quite common with main() but can  happen anywhere. For example, you define a buffer or a structure as a  local variable within main(), but then you access that buffer or  structure from some other function (by passing a pointer to it). This is  dangerous &#8211; you need to declare the buffer or structure as &#8220;static&#8221; if  you want to do that. Otherwise the buffer or structure might be  optimised away and not actually exist when that other function tries to  access it. If that structure contained a pointer for example, that would  become a bad pointer.
 [B]Imprecise Bus Fault[/B]
 For the Cortex M3, an imprecise bus fault (as indicated by bit 10 in  the CFSR register) means that a write to an invalid address was  attempted. If you look at the program counter, the naughty naughty write  is usually present in the 3 or so instructions leading up to the  program counter address. Because of the Cortex M3 write buffer system,  the program counter might have advanced slightly before the actual bus  write took place, hence you need to look back slightly to find the  erroneous write.
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