Where does wakeup interrupt return to ??

[lpcware]

Content originally posted in LPCWare by Chucky on Fri Jun 24 10:29:13 MST 2011
Hi there,

I need help :)

I have managed to put the LPC1343 into deep sleep using the wfi command.

I am also able to wake it via port pin, and the wakeup interrupt routine is executed correctly.

However when processor exits the wakeup interrupt (via bx LR), it goes into nirvana and hangs.

I would expect the processor to return from wakeup interrupt to the next instruction following the wfi that has initiated the deepsleep.

This would be the procedure for a normal interrupt, but seems not to be the case for the wakeup interrupt.

Any ideas highly appreceated,

Chucky :)

[lpcware]

Content originally posted in LPCWare by daniel.widyanto on Mon Oct 15 00:30:27 MST 2012
I think his real problem is that he uses some naked functions without saving its LR register in the ISR stack. Hence, causing error jumping to 'nirvana' :), when the subroutine wants to return from ISR to main thread.

It's not a problem with BOD peripheral.

[lpcware]

Content originally posted in LPCWare by robert.palmer on Wed Oct 10 13:37:40 MST 2012
I'm having the same issue with the BOD.  You said you found your problem with the lr push/pop, were you working in assembler?  You don't mention the resolution of the BOD part of the issue.

[lpcware]

Content originally posted in LPCWare by Chucky on Mon Jun 27 15:12:52 MST 2011
ARM literature is written like a Rolls Royce manual:

The components are listed and explained in detail, but the working principle is absolutely  ignored.

As if they think that nobody will use it anyway ...

It's so nice when it works,

Charles :)

[lpcware]

Content originally posted in LPCWare by CodeRedSupport on Mon Jun 27 12:26:09 MST 2011

---

Quote: Rob65

I would defenitely not expect this to be part of a user/reference manual.
For stuff like this I will consult one of the general ARM manuals from arm.com or maybe "The Definite Guide to the ARM Cortex-M3".

---

For future reference, we have a list of links to useful ARM documentation at:

http://support.code-red-tech.com/CodeRedWiki/ArmCpuInfo

Regards,
CodeRedSupport

[lpcware]

Content originally posted in LPCWare by Rob65 on Mon Jun 27 08:42:53 MST 2011

---

Quote: Chucky
The programmer who considers himself as experienced will fall into traps from time to time... just like me this week :)

---

Thanks
What a nice way of telling me that I make similar stupid mistakes
(Yes - I do ... :D)

---

Quote: Chucky

The reason why my return from interrupt failed, was that I was using subroutine calls inside the interrupt service routine without pushing/popping the LR register at the outer extremes of the interrupt routine. This will cause the bx lr instruction to bounce back to the end of the subroutine instead of returning from the interrupt. Its different on the ARM compared to 'normal' micros :)

And btw. this is something I would have loved to learn from any user or  reference manual, instead of finding it out the hard way ...

---

I would defenitely not expect this to be part of a user/reference manual.
For stuff like this I will consult one of the general ARM manuals from arm.com or maybe "The Definite Guide to the ARM Cortex-M3".
This book is a valuable source of information for those who are new to ARM and especially the Cortex-M3. It explains a.o. the complete programming model including interrupt use, the difference between privileged mode and user mode and much more.

Even after programming ARM processors for over 10 years (ARM6/7/7TDMI/926/948/SA-1100/Cortex-M0/M3) I found this book to be a great source of information. Most (or all) of the information can also be found in the ARM-Architecture Reference Manual and the Cortex-M3 Generic User Guide from ARM (free downloads are available) but the book is for most people much easier to read - it explains the Cortex M3 in a structured way that build up from basic workings of the processor towards a complete system overview.

Rob

[lpcware]

Content originally posted in LPCWare by Chucky on Sun Jun 26 08:32:24 MST 2011
Ouch ...

I cannot overestimate the importance of approaching things very gradually when trying out new features on a processor.

The programmer who considers himself as experienced will fall into traps from time to time... just like me this week :)

The reason why my return from interrupt failed, was that I was using subroutine calls inside the interrupt service routine without pushing/popping the LR register at the outer extremes of the interrupt routine. This will cause the bx lr instruction to bounce back to the end of the subroutine instead of returning from the interrupt. Its different on the ARM compared to 'normal' micros :)

And btw. this is something I would have loved to learn from any user or reference manual, instead of finding it out the hard way ...

Then I had to disable the wakeup interrupt inside the interrupt routine (due to bouncing switches), else the same wakeup interrupt will perform several times ...

And I had to set the clearpending bit outside the interrupt routine, in order to prevent an already pending wakeup interrupt the next time you want to go to sleep (also due to switch bounce).

The last 2 are more obvious but all my tests failed because of the big problem I had with the failing returns ...

Have a great sunday,,

Charles :)

[lpcware]

Content originally posted in LPCWare by Ex-Zero on Sat Jun 25 12:39:22 MST 2011
Which hardware did you add to PIO0_2 ?

[lpcware]

Content originally posted in LPCWare by Chucky on Sat Jun 25 12:12:48 MST 2011

---

Quote: Zero
And the result is ?:confused:?

3. Wait for a clairvoyant :)

---

:)

Hi Zero,

I tried #1 and #3 and found out more strange things:

When I keep the BOD reset enabled when going into deep sleep, the wakeup event will always generate a reset, although there is sufficient bypass and not even a tiny voltage drop seen on the scope.

When I disable BOD reset before entering deep sleep, there is no reset and the wakeup interrupt routine is executed correctly, but return from wakeup interrupt always hangs the processor, although I have checked the stack contents incl. the return address (yes, it points to next instruction after wfi) to be correct.

When I don't execute the wfi, but instead call the same wakeup interrupt via set pending, it will execute and return correctly.

Now all that's left for me today is ... having a beer ... and one on you too ...

Charles :)

[lpcware]

Content originally posted in LPCWare by Ex-Zero on Fri Jun 24 22:26:09 MST 2011

---

Quote:

...have read through that before posting my question...

---

And the result is ?:confused:?

---

Quote:

...So,, please any solution ???

---

At least 3:

1. Use the above mentioned working sample to find the difference to your not working code :(

2. Post your wakeup code to let this work do someone else :mad:

3. Wait for a clairvoyant :)

[lpcware]

Content originally posted in LPCWare by Chucky on Fri Jun 24 17:58:19 MST 2011

---

Quote: Zero
Compare your nirvana code to:

http://ics.nxp.com/search/?search=an10973&links=555,096

---

have read through that before posting my question.

So,, please any solution ???

[lpcware]

Content originally posted in LPCWare by Ex-Zero on Fri Jun 24 10:57:36 MST 2011

---

Quote:

...Any ideas highly appreceated...

---

Compare your nirvana code to:

http://ics.nxp.com/search/?search=an10973&links=555,096