Content originally posted in LPCWare by JUM on Thu Jul 28 06:48:45 MST 2011
Hi,
according to Figures 5-1 and 5-2 in "ARM® Debug Interface v5 Architecture Specification" the data bits on SWDIO are valid at the falling edge of SWCLK.
BUT: According to Figures 24 and 25 in "ARM® Debug Interface v5 Architecture Specification ADIv5.1 Supplement" the data bits on SWDIO are valid at the rising edge of SWCLK!?
What is true?
Best regards
JUM
