Rit mask register?

[lpcware]

Content originally posted in LPCWare by Albert on Tue Feb 15 07:08:34 MST 2011
Hi all,

Someone can explain how the mask register works on RIT?

I see the block diagram and I didn't unterstend, because the output bus of the comparator and the mask is 32bits, but both are conected in the OU port input.

Thank in advance.

[lpcware]

Content originally posted in LPCWare by skysat on Thu Feb 17 22:49:20 MST 2011
I must respectfully disagree with NXP_USA.  He has it backwards.  In other words, he stated exactly what the manual states - which is wrong.  In any case I suggest that Albert or anyone else just try RIMASK set to all ones and again to all zeros and see what works and what doesn't.  That's what I had to do.  Notice that the default value is 0.
   Randy

[lpcware]

Content originally posted in LPCWare by deBoogle on Thu Feb 17 14:45:45 MST 2011
I do have to say that the user manual seems to confuse this issue a little, it states that a '1' in the MASK register 'forces' a compare on corresponding bits between compare and counter registers.  But in the functional descrption at the end of the chapter on RIT it states that writing a '1' removes bits from the comparison.  In my mind, 'forcing a compare' suggest that those bits marked with a 1 will be compared and not the others.

I am aware its a terminology thing, but I bet i'm not the only one who was confused by this.

deBoogle

[lpcware]

Content originally posted in LPCWare by Albert on Wed Feb 16 12:22:35 MST 2011
Thanks.

[lpcware]

Content originally posted in LPCWare by NXP_USA on Tue Feb 15 17:48:36 MST 2011
All of the bits in the compare register must match the counter register, unless a corresponding bit is set in the mask register.

Examples:
MASK register is 0xFFFFFFFF
Comparison will ALWAYS match regardless of the values of COMPVAL or COUNTER

MASK register is 0x00000000
Comparison will only match when COMPVAL[0:31] == COUNTER[0:31]

MASK register is 0x0000FFFF
Comparison will match whenever COMPVAL[16:31] == COUNTER[16:31]

-NXP