Content originally posted in LPCWare by MikeSimmonds on Thu Sep 27 09:09:39 MST 2012
[FONT=Tahoma][SIZE=2]
Quote: Jaecko
Could it be that the IAP-functions don't like it, when they are bugged by interrupts?
The only explanation i have for this...
[/SIZE][/FONT][SIZE=2][FONT=Tahoma]That's exactly the reason.
The IAP read cpuid, read serial, read boot rom version do not use any ram in the 'top 32 bytes' and only 3 levels of stack (12 bytes).
However it works by temporarily mapping a rom area over the first 600 (hex) [or maybe 800] bytes of the flash area.
So if your code is located in low flash -- bang. Also if you have any interrupts whilst the IAP call is in progress the 'fetched' vector is rubbish instead of your handler routine, and again -- bang.
The need to disable or otherwise prevent interrupts during IAP is documented in the UM10360 (for LPC1769), but I admit that like a lot of important issues they don't emphasise it enough.
Fetching the s/n at startup before you enable any interrupts is probably a good idea, but this tells you why you ought to do it.
Regards, Mike
[/FONT][/SIZE]