Maximum stack usage LPC1769

[lpcware]

Content originally posted in LPCWare by callem on Mon Mar 23 05:20:38 MST 2015
Is there a way to calculate the maximum amount of c-stack used on a LPC1769 using LPC Xpresso 7.6.2. I have found no examples regarding this. I understand that this might be a bit tricky as the size of the c-stack is not fixed size.

[lpcware]

Content originally posted in LPCWare by lpcxpresso-support on Tue Mar 24 11:25:18 MST 2015
There is no stack checking hardware on the Cortex-M families, so all means of checking stack usage are manual to some degree.

If you are using the LPCXpresso managed linker scripts, by default the stack is placed at the top of the 1st bank of RAM (as displayed in the memory configuration editor), program data is at the bottom on this RAM bank, and the heap immediately after that.

There are a number of approaches that are commonly seen for checking stack usage. For example...

On Cortex-M3/M4 parts you can configure the MPU to trigger a fault if the stack reaches a particular point in memory

When debugging, you could set a watchpoint in the debugger at the lowest point you want the stack to be able to grow down to, and see if this ever is hit.

You could relocate the stack so that it is in the bottom of the RAM bank, so that if it grows too much, it will fall off the end and trigger a fault. If your MCU has multiple RAM banks, you could even put the stack into its own bank.

You could initialize the memory used for the stack with a known value (e.g. 0xDEADBEEF), then check during debugging how far down through this RAM the stack has got.

You might also find this article of interest...

http://embeddedgurus.com/state-space/2014/02/are-we-shooting-ourselves-in-the-foot-with-stack-overfl...

Regards,
LPCXpresso Support