Content originally posted in LPCWare by CodeRedSupport on Mon Feb 25 17:35:27 MST 2013
The assumed clock is whatever is calculated by the debug utility. In this case, the IAP flash API needs to know the core clock frequency to program flash. Not all bootrom flash APIs require this information. The reason you see 4 MHz reported, is (in one instance) you specified vector catch (i.e. reset vector catch) which instructs the debugger to include additional reset processing (of which vector catch is one part of) during connection. After reset, the core clock is the IRC value, 4 MHz, so that's why you see it as Zero points out.
Having said all that, the clock setting is unrelated to your problem. It appears there's an issue handling the gap in your image. I can't reproduce a problem here using a similar image. If you'd like to post your .axf file, I can have a look. In the meantime, I recommend you update to the LPCXpresso 5.1.2 release.
Regards,
CodeRedSupport
Quote: Gustavo
Zero,
please tell me...
1. Could you explain me what is the "assumed clock" ? How it is calculated ?
2. When I activate the Vector catch option it decrease to 4 MHz... What is the "Vector Catch" Option ?
Here's the log...
thanks in advance,
Gus.
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LPCXpresso Debug Driver v5.0 (Dec 18 2012 17:03:30 build 1101)
Looked for chip XML file in C:/nxp/LPCXpresso_5.0.14_1109/lpcxpresso/bin/LPC1769.xml
Looked for vendor directory XML file in C:/nxp/LPCXpresso_5.0.14_1109/lpcxpresso/bin/nxp_directory.xml
Found generic directory XML file in C:/nxp/LPCXpresso_5.0.14_1109/lpcxpresso/bin/crt_directory.xml
Emu(0): Conn&Reset. DpID: 2BA01477. Info: WIN64HS12
SWD Frequency: 3000 KHz. RTCK: False. Vector catch: False.
Packet delay: 0 Poll delay: 0.
NXP: LPC1769 Part ID: 0x26113F37
Connected: was_reset=false. was_stopped=false
v Registered license, download limit of 128K
Writing 24772 bytes to 0000 in Flash ([B][COLOR=Red]assumed clock: 100.0MHz[/COLOR][/B])
Erased/Wrote page 0-6 with 24772 bytes in 1884msec
Flash write Done
Writing 23216 bytes to 60C8 in Flash ([COLOR=Red][B]assumed clock: 100.0MHz[/B][/COLOR])
[B][COLOR=Red]IAPExecute Error: Ef(9). Flash erase or write operation aborted.
15: Target error from Commit Flash write: Ef(9). Flash erase or write operation aborted.[/COLOR][/B]
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