LPC1768 interrupt time waste

[lpcware]

Content originally posted in LPCWare by AmirHejazi on Fri Oct 04 01:15:58 MST 2013
hi
is it possible to define amount of clock pulses used(consumed) in every interrupt?(assume that the handler does not contain any code)

[lpcware]

Content originally posted in LPCWare by TheFallGuy on Fri Oct 04 03:37:42 MST 2013
If you read the PDF file that I provided the link to, then it explains everything. Read the section on the NVIC.

[lpcware]

Content originally posted in LPCWare by AmirHejazi on Fri Oct 04 03:33:40 MST 2013
thanks
1- is it a fixed value or it's the max value of latency?
2- 12 cycles for push the handler and 12 cycles for pop from it. (page 7)
that means a simple interrupt hendler consumes 24 clock pulses. per every call. 
Did i said that correctly?

best regards
Amir

[lpcware]

Content originally posted in LPCWare by TheFallGuy on Fri Oct 04 03:01:16 MST 2013
According to this:
http://www.arm.com/files/pdf/introToCortex-M3.pdf
the interrupt latency of a Cortex-M3 is 12 cycles (compared with 24-42 for ARM7TDMI).