Content originally posted in LPCWare by samc on Fri Feb 10 06:41:45 MST 2012
Hello,
just wanted to post this, might save some time:
I found the SSP interface on LPC1226 acts strange:
I set SSP_CLK to 36MHZ and also CPU clock was 36MHZ, everything working fine.
Then switched cpu clock to 12MHz by SYSAHBCLKDIV and thats where the problem started: the SSP FIFO didnt act as a FIFO anymore, more like an eight byte shift register. Resetting the pheriperal didnt help also.
Solution:
Finally, I set the SSP_CLK to 12MHz and everything went fine.
Samc
