Content originally posted in LPCWare by zuzu on Fri May 28 23:01:39 MST 2010
TheFallGuy: older 8 bit part (PIC18) it's a radio protocol controller, taking packets from RF chipset, process, send back packets over radio and route to/from UART if necessarily. the main problem it consumes ~25mA/10MIPS @3V3 which will be huge for near future portable device. We are very excited about LPC11xx but several changes needs to be made, especially on INT handling. We are sure will be some code reduction and efficiency due to 32bit - actual code (including some precomputed CRC rom tables) has ~16KB. Thanks very much.
nerd62: thanks very much for info, I'll be back after our test boards will be complete, now we expect LPC's from Farnell.
One more question: LPC1111 (QFN33) has 2 pins of Vdd. Both are Vdd or one is VddIO (which one) and can be used at different potential for shifting levels? From data sheet is not clear but several schematics of boards treat them separatelly (Vdd and VddIO).
Little bit confusing
I found a old datasheet (preliminary rev 00.12 from 3 december 2009) which indeed has VDDIO terminology but in current datasheet not. Moreover, there is a foot note that says "Tie together VDD(3V3) and VDD(IO) externally. If separate supplies are used for VDD(3V3) and VDD(IO), ensure that the voltage difference between both supplies is smaller than or equal to 0.5 V"
So we cannot run core at 1V8 and IO at 3V3 ?