LPC erratas

[lpcware]

Content originally posted in LPCWare by raimond on Tue Jun 01 10:17:55 MST 2010
Are the errata sheets of the LPC "fair"? They seems very... good. A little example: The newest errata sheet on the NXP site is for the LPC1751. And a known bug for the LPC1751 is... something on the Ethernet port... !

I like the LPCs and I use'em a lot these days, but it seems that NXP just do not have time for these errata sheets...

[lpcware]

Content originally posted in LPCWare by domen on Wed Jun 30 23:19:34 MST 2010
From the manuals it seems there are quite some differences :P
Oh, and I did use lpc1343, and tried a bunch of different setups.

So... unless you actually try it on hardware, this discussion seems a bit pointless to me.

[lpcware]

Content originally posted in LPCWare by raimond on Tue Jun 29 06:07:25 MST 2010
As I said, I didn't use LPC13xx USB and cannot be sure :) but I'm using LPC17xx USB and yes, you can start USB without ever touching the USB PLL. In fact I use the main PLL at 96 MHz and never touched a bit of the USB PLL registers. And from the manuals, the LPC13xx USB is the same.

The default bit you mentioned isn't relevant because starting the USB clock is a sequence.

[lpcware]

Content originally posted in LPCWare by domen on Mon Jun 28 23:15:25 MST 2010

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Quote: raimond
No, there is no default setting. Just configure any PLL you like (to 48MHz) and then [B]switch[/B] the USB clock to it.

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USBCLKSEL's default value is 0, which means USB PLL out.

Lets try to phrase this in a different way.
Can you start up USB, without starting USB PLL? I'd really like to see that code.

[lpcware]

Content originally posted in LPCWare by raimond on Sat Jun 26 00:45:33 MST 2010
No, there is no default setting. Just configure any PLL you like (to 48MHz) and then switch the USB clock to it.

By the way, the second PLL was added just as a convenience to users that want a non 48MHz main clock. With a single PLL you are forced to 48MHz if you want to use the USB. (Or 96MHz on LPC17xx).

[lpcware]

Content originally posted in LPCWare by domen on Tue Jun 22 13:56:41 MST 2010
The default setting is USB PLL... so switching to main requires to configure that. Or am I not getting you?

[lpcware]

Content originally posted in LPCWare by raimond on Tue Jun 22 11:19:28 MST 2010

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Quote: domen
Just seems silly that to not use X one needs to configure and start up X first. :p

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Hehe, you didn't get it right :)
In the LPC13xx user manual, 9.12.1 USB clock configuration, it is stated clear, in steps, that you can set the main PLL as the USB clock (if it outputs a 48MHz) directly, and IF you want/have to use the USB PLL (if your main PLL or main clock isn't 48MHz), then you should configure the USB PLL to 48MHz and then switch the USB clock to it.

So my reading of the manual is: setting and updating the clock source for USB should be done with that clock source RUNNING. Wether that clock source is from either PLL it doesn't matter, the clock should be running.

There was a logical problem: switching from X to Y means you have X already. But you are not forced to have X in order to have Y.:)

[lpcware]

Content originally posted in LPCWare by domen on Sun Jun 20 06:10:00 MST 2010

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Quote: raimond
Well, if you want to switch from thing1 to thing2... you are supposed to have thing1 in the first place ...:)

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Just seems silly that to not use X one needs to configure and start up X first. :p

[lpcware]

Content originally posted in LPCWare by raimond on Sun Jun 20 05:55:52 MST 2010

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Quote: domen
Wait... am I reading this right?

To switch USB clock to main pll, you HAVE to have USB PLL running? How nice :P

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Well, if you want to switch from thing1 to thing2... you are supposed to have thing1 in the first place ...:)

I don't know about LPC13xx USB, I only use LPC17xx USB. I indeed use main PLL for the USB clock too, I set the main PLL at 96MHz, div2 = 48MHz sharp for the USB (I have an external 12MHz crystal). So, for a 4MHz less (than 100) I saved a PLL running.

I think that another thing is funny: the bootrom use the main PLL for the USB for the compatibility with the chips without usb...:D So, have you usb or not, the bootloaders are compatible... maybe for the serial part, but if you want usb, that's another thing, so, using the usb cannot be compatible to not using usb... So, my thought is that they could be used any PLL they like for the USB thing...:cool:

[lpcware]

Content originally posted in LPCWare by domen on Sun Jun 20 01:01:44 MST 2010
Wait... am I reading this right?

To switch USB clock to main pll, you HAVE to have USB PLL running? How nice :P

[lpcware]

Content originally posted in LPCWare by kendwyer on Sat Jun 19 14:37:29 MST 2010
The LPC1343 USB will run off both the Main PLL and the USB PLL. The BootROM uses the Main PLL by default - this is to support the non USB LPC1300 parts. It should be switched over to the USB PLL if that is desired.
All of the CLKSEL/UEN registers require the “from” and “to”  clocks to be running in order to switch the clock. This is because of the clock synchronization logic that prevents glitches.

[lpcware]

Content originally posted in LPCWare by domen on Sun Jun 13 11:07:33 MST 2010

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Quote: kendwyer
Out of curiosity, what was the suspected errata?

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USB seems to work off main clock only if you initialize USB PLLs first (even to incorrect values)

[lpcware]

Content originally posted in LPCWare by kendwyer on Fri Jun 11 20:34:17 MST 2010
[COLOR=black][FONT=&quot]Updated LPC17xx errata sheets! Someone is listening....
http://ics.nxp.com/support/documents/microcontrollers/?search=lpc17xx&type=errata&sort=date[/FONT][/COLOR]

[lpcware]

Content originally posted in LPCWare by raimond on Thu Jun 10 22:07:39 MST 2010
i'm not believing it either, just in this forum some time ago I reported a problem with the Power bits in the LPC17xx. In the manual said that the reserved bits should be written to zero, but this thing had a strange behaviour (it seems that writing some reserved bit to zero disables somehow some part of GPIO).Since then, I set/clr bits in that register only with |= or &= operators, never directly '='. And besides that, the GPIO are supposed to be always enabled...

Another thing: I have an application with three LPCs, one 17xx, and two 13xx. The chips are conected on a single i2c bus. I had a hard time to make the i2c communication to work reliable. For example, the last version of the i2c driver sets the MASK register for slave as 0x00. And it works like a charm. Just read the manual and tell me what do you understand from it...

Don't get me wrong: the LPC1xxx are good micros. But I don't understand why the NXP do not make their erratas credible. Are they focused on other things? Like expanding their family? But then, what about THESE micros that we are using NOW?

[lpcware]

Content originally posted in LPCWare by kendwyer on Thu Jun 10 15:22:43 MST 2010

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Quote: domen
I'm not believing in it, partly because I submitted an errata report candidate (for lpc1343) a few weeks ago :D

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Out of curiosity, what was the suspected errata?

[lpcware]

Content originally posted in LPCWare by mik84 on Thu Jun 10 03:45:53 MST 2010
Well we haven't got a real answer from the NXP guys yet... Sadly, because I really wanted to hear their point of view.

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Quote: domen
I'm not believing in it, partly because I submitted an errata report candidate (for lpc1343) a few weeks ago :D

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[lpcware]

Content originally posted in LPCWare by domen on Fri Jun 04 06:37:28 MST 2010
I'm not believing in it, partly because I submitted an errata report candidate (for lpc1343) a few weeks ago :D

[lpcware]

Content originally posted in LPCWare by mik84 on Fri Jun 04 03:50:41 MST 2010

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Quote: raimond
Are the errata sheets of the LPC "fair"? They seems very... good. A little example: The newest errata sheet on the NXP site is for the LPC1751. And a known bug for the LPC1751 is... something on the Ethernet port... !

I like the LPCs and I use'em a lot these days, but it seems that NXP just do not have time for these errata sheets...

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I also have the same question. Does NXP really put so much effort delivering an almost perfect chip, or is just the errata list too "optimistic"?

Comparing with the Luminary chips or the ST ones, the LPCs errata list look like heaven. Maybe to beautiful to be true, but I really would like to belive in it.

[lpcware]

Content originally posted in LPCWare by kendwyer on Wed Jun 02 15:10:29 MST 2010
Yep, good catch !

[lpcware]

Content originally posted in LPCWare by raimond on Tue Jun 01 22:03:13 MST 2010

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Quote: kendwyer
The ES are up-to-date, it might be the NXP site....The latest ES for the LPC1751 is here:
http://ics.nxp.com/support/documents/microcontrollers/pdf/errata.lpc1751.pdf

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Hehe, you're missing the point, I'm pretty sure that LPC1751 doesn't have an Ethernet port ... :D

[lpcware]

Content originally posted in LPCWare by kendwyer on Tue Jun 01 15:57:23 MST 2010
The ES are up-to-date, it might be the NXP site....The latest ES for the LPC1751 is here:
http://ics.nxp.com/support/documents/microcontrollers/pdf/errata.lpc1751.pdf