HardFault_Handler on LPC111x

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HardFault_Handler on LPC111x

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by ArtjomGromak on Sun Sep 09 10:04:34 MST 2012
Hi!
Where I can find sample of fault exception handling for lpc111x (Cortex-M0)?

Thanks.
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by Brutte on Mon Sep 10 11:31:56 MST 2012

Quote: ARM, ARMv6
Under the ARMv6-M exception priority scheme, a processor handles a precise fault in one of the following ways:

[LIST]
[*] -by taking a HardFault exception
[*] -by using the Lockup mechanism in the case of a fault arising while executing a HardFault or NMI, (...)
[/LIST]

In ARMv6-M, faults are considered fatal. The only fault status information provided on entry to the HardFault handler is the EXC_RETURN value, that indicates whether the fault originated from Thread or Handler mode.


:eek:
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by ArtjomGromak on Mon Sep 10 06:37:26 MST 2012

Quote: kayoda
Start here? http://support.code-red-tech.com/CodeRedWiki/DebugHardFault



Thanks.
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847件の閲覧回数
lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by ex-kayoda on Sun Sep 09 10:06:47 MST 2012
Start here? http://support.code-red-tech.com/CodeRedWiki/DebugHardFault
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