Content originally posted in LPCWare by g4bch on Mon Jun 14 05:15:25 MST 2010
Has anyone any ideas what I'm not doing that is stopping the A/D converter from working.
I'm trying to get the A/D to trigger from 32 bit counter 0 as it resets on MR0 match. I also want to use a PWM output at the same period with ON/Off ratio set by match register 2.
By monitoring the peripheral registers I can see that the counter and the PIO0, 1 PWM output are active, but not the A/D.
The A/D seems to be set up to start on the rising edge of CT32B0_MAT0, but the program just hangs waiting for interrupt with the A/D register stuck at 0.
The code snip shows the timer and A/D set up.
Any ideas as to what I'm missing?
Peter
Code snip
/******************************************************************/
//set up counter timer
// clock already set to 48MHz by CMSIS set up
//CT32B0 Using Match register 0 to trigger ADC and generate PWM timing
//Trigger ADC at 250kHz
LPC_SYSCON->SYSAHBCLKCTRL |= (1<<9); //turn on timer clock
//set up 32 bit counter timer TMR32B0 as follows:
//period 250kHz set by match register 0 to allow triggering of A/D
//PWM output on match 2
LPC_TMR32B0->MR0 = Period; //250kHz in Match register 0
LPC_TMR32B0->MR2 = Period/2; //set PWM to half scale to start
LPC_TMR32B0->PWMC = 0x1<<2; //enable PWM output CT32B0_MAT2
LPC_TMR32B0->MCR = 0x1<<1; // Reset on MR0
LPC_TMR32B0->TCR = 0x1; //Enable 32 bit timer 0
//enable PWM output on match 2, copied from timer32.c lines 380/1
LPC_IOCON->PIO0_1 &= ~0x07;
LPC_IOCON->PIO0_1 |= 0x02; // enable Timer0_32 MAT2
/******************************************************************/
//Set up ADC copied & modified from adc.c
//Input on channel 7 triggered from match 0 on 32 bit timer 0
//read by interrupt
/* Disable Power down bit to the ADC block. */
LPC_SYSCON->PDRUNCFG &= ~(0x1<<4);
/* Enable AHB clock to the ADC. */
LPC_SYSCON->SYSAHBCLKCTRL |= (1<<13);
LPC_IOCON->PIO1_11 = 0x01; // Select AD7 pin function
//Select AD input 7 for conversion
LPC_ADC->CR = 0x1<<7;
//set up ADC clock divider bits 8 - 15
LPC_ADC->CR |= ((SystemCoreClock/LPC_SYSCON->SYSAHBCLKDIV)/ADC_CLK-1)<<8;
// BURST = 0, CLKS = 000 10 bit resolution
//ADC conversion starts on rising edge of CT32B0_MAT0
LPC_ADC->CR |= (0b0100<<24);
//enable ADC interrupt
NVIC_EnableIRQ(ADC_IRQn);
LPC_ADC->INTEN = 0x1<<7; /* Enable interrupt for channel 7 */
/**************************************************************************/