usingg RI timer in LPC1317

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usingg RI timer in LPC1317

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by aamir ali on Thu Aug 01 04:24:57 MST 2013
1. What is the purpose of MASk register. I don't understand by datasheet should I set mask value equal to compare value for getting interrupt at that value when counter reached it. Or I should left it clear. Ineed a straight 1 sec delay repeatedly.

I checked example code from LPCopen & made one example & its working ok now. I had put 0 in mask register  I need 1 sec int only. Is it correct way, by writing 0 to mask register:


void OSTIMER_IRQHandler(void)
{
/* Clearn interrupt */
LPC_RITIMER->CTRL      = ( LPC_RITIMER->CTRL & 0x0000000F) | (BIT_0);    /* clear int flag */   
}


main()
{
    LPC_RITIMER->CTRL      = ( LPC_RITIMER->CTRL & 0x0000000F) & (~(BIT_3));  /* disable timer */
    LPC_RITIMER->CTRL      = ( LPC_RITIMER->CTRL & 0x0000000F) | (BIT_0);    /* clear any int flag */
    LPC_RITIMER->COMPVAL   = 72000000;   /* 1 sec delay */
    LPC_RITIMER->COMPVAL_H = 0;
    LPC_RITIMER->MASK      = 0;
    LPC_RITIMER->MASK_H    = 0;
    LPC_RITIMER->COUNTER   = 0;
    LPC_RITIMER->COUNTER_H = 0;
    
    LPC_RITIMER->CTRL      = ( LPC_RITIMER->CTRL & 0x0000000F) & (~(BIT_2));  /* debug has no effect */
    LPC_RITIMER->CTRL      = ( LPC_RITIMER->CTRL & 0x0000000F) | (BIT_1);     /* timer will be cleared to zero on int */
    LPC_RITIMER->CTRL      = ( LPC_RITIMER->CTRL & 0x0000000F) | (BIT_3);     /* enable timer */
    NVIC_EnableIRQ(RIT_IRQn);
    
    while(1);

}



2. In LPCopen the name of ISr was

void RIT_IRQHandler(void)
{
/* Clearn interrupt */
Chip_RIT_ClearInt(LPC_RITIMER);
}


But in startup_LPC13Uxx.s its void OSTIMER_IRQHandler(void). Why is it different or LPCopen uses updated version of file

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by mc on Mon Aug 05 13:37:27 MST 2013
Hi Aamir,
When you mask a particular bit means the result of a comparison of that bit will be considered always true. As the mask register is 0 result of comparison of all bits in compare register will be taken into account. It looks correct.

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