Content originally posted in LPCWare by samc77 on Fri Jan 18 08:03:36 MST 2013
Hi,
So why does the manual mention, that in Deep-Sleep:
"In Deep-sleep mode the CPU clock and peripheral clocks are shut down to save power;
logic states and SRAM memory are maintained."
What is ment with "logic states" if not the logic states of the pins?
Ok, if it is still like this, and I need to use Deep-Sleep. I will have to make sure, all GPIOs that cannot be tristate during deep-sleep must have a pullup or pulldown, right?
That can work if the GPIOs always keep at the same state for every deep-sleep. If a GPIO sometimes must be high, sometimes low, how to do this??
Please, can anybody comment on this?
I didnt expect it to work like this, the LPC17xx are different..and I didnt find this to be mentioned in the docs anywhere.
Thanks