About Using Segger JLink for LPC43XX Dual Core Debugging

[lpcware]

Content originally posted in LPCWare by slonst on Mon Sep 23 04:35:30 MST 2013
   Asking Document for LPC4300 dual-core debugging based on JLink simulator, I succeed to use  ULink simulator for LPC4300 dual-core simulation, but I fail to use JLink simulators for dual-core simulation. I don't know how to configure JLink for this simulation, please give me a Document or a guidance.

[lpcware]

Content originally posted in LPCWare by bavarian on Tue Sep 24 04:06:04 MST 2013
The JLINK V7.0 and higher should behave the same way as the ULINK2 with regards to dual core debugging.
We are not talking about "simulation" right? It's a debugger connection to a real target board (KEIL µVision debugger connected via a JLINK box to an LPC4300 board).
If you open two instances of µVision you can make in each instance individual settings for the JTAG connection to the Cortex-M4 and the M0 core.
You only need to select the cores and take care of the reset type (see attached pictures).

Regards,
NXP Support