lpc55s69 eval board (device rev 1B), adding clkout at 1 MHz changes adc mid range reading of 0.73 %

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lpc55s69 eval board (device rev 1B), adding clkout at 1 MHz changes adc mid range reading of 0.73 %

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EinHexenMeister
Contributor I

using "MCUXpresso IDE v11.6.0 [Build 8187] [2022-07-13]" and "SDK_2_12_0_LPCXpresso55S69" with SDK-lpcxpresso55s69_lpadc_interrupt example code

i implemented the lpcxpresso55s69_lpadc_interrupt example code into my project and noticed a 0.73 % (full scale err) adc reading error at 1.650 V input on cha-0. the unaltered SDK example raw reading was 2080 versus 2110 with running my code. since my code was written in C++ and had several other peripherals already included it took me quite a while to track the problem down.

bottom line is to take the unaltered SDK-lpcxpresso55s69_lpadc_interrupt example code, add PIO1_27 with CLKOUT i/o settings to the pinmux.c file and add "kCLOCK_DivClkOut=150" as well as attach "MAIN_CLK_to_CLKOUT" to clock_config.c to make the error reproducible.

changing the clkout frequency to 10 MHz does not really cause any major changes to the adc reading error. i also changed the adc calibration settins to "#define DEMO_LPADC_DO_OFFSET_CALIBRATION true"

now the question is, is this behavior legit or can it be seen as a bug or whatever one want's to call it.

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EinHexenMeister
Contributor I

correct reading without 1 MHz setting on CLKOUT not routed to PIO1_27.

step one : connect 1.65 V to adc input channel 0
step two : adc readings will fluctuate a little but in average it will produce a raw count of 2080 (theoretically expected 2048)

NOW connect internally 1 MHz to CLKOUT routed to PIO1_27.

NO OTHER SETUP CHANGES

step three : adc readings will fluctuate a little but in average it will produce NOW a raw count of 2110 (previously 2080)

reading 2080 "WITHOUT" internally connecting 1MHz CLKOUT to PIO1_27.
reading 2110 "  WITH  " internally connecting 1MHz CLKOUT to PIO1_27.

in my opinion internally connecting 1 MHz to CLKOUT and routing it to PIO1_27 should not cause the adc reading to jump from 2080 to 2110 when a mid range voltage of 1.650 V is applied to adc channel 0.

how can, or should, an adc unrelated digital setup change (i.e. enabling the CLKOUT signal) within the mpu cause the data output reading of a calibrated adc to change by a count of 30 = 0.73 % full scale

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Alice_Yang
NXP TechSupport
NXP TechSupport

Hello,

Do you meaning every measurement is about 1.650V error? 

If yes, the normal method is to get a offset value by using "0"v, than in each convert, deduct the offset, then will get the most accurate result. Because the demo board is not design dedicated to demo ADC performance, it doesn't take some strict design rules for ADC circuit.

 

BF

Alice

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Alice_Yang
NXP TechSupport
NXP TechSupport

Hello @EinHexenMeister 

There may be noise to ADC , have a look at:

 

https://www.nxp.com.cn/docs/en/supporting-information/TN00009.pdf  

 

BR

Alice

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