lpc4337 problem while setting PLL after reset

[lpcware]

Content originally posted in LPCWare by PeterZos on Fri Apr 17 03:29:46 MST 2015
We are designing a new product based on lpc4337 and I noticed a problem. While resetting the cpu with NVIC_SystemReset the firmware doesn't start. This happens only a few times a day.
I tried to debug the problem, so I took the basic "FreeRTOS Blinky" from LPCOpen v2.16 for LPCXpresso sample and add the code to reset the cpu after a few minutes.
After a few hours of running this sample, the lpc4337 hangs in HardFault_Handler.

I examined the stack with openocd and found that cpu hangs while setting pll in function Chip_SetupCoreClock().

Could you please help me solve this problem

Attachments:
lpc4337_test.zip - modified LPCXpresso blinky sample, which in hangs after a few (12) hours
openocd_log.txt - openocd output
disassembled_c_code.txt - disassembled Chip_SetupCoreClock

Thanks
Peter

Original Attachment has been moved to: lpc4337_test.zip

Original Attachment has been moved to: openocd_log.txt.zip

Original Attachment has been moved to: disassembled_c_code.txt.zip

[lpcware]

Content originally posted in LPCWare by mc on Mon Sep 28 12:01:00 MST 2015
Hi,
Could you please replace NVIC_SystemReset() by below two lines of code?  This uses core reset instead of system reset.

*(volatile unsigned int *)0x40043100 = 0x10400000; //memmap with boot ROM address
*(volatile unsigned int *)0x40053100 =(1<<0); // Core reset

[lpcware]

Content originally posted in LPCWare by starblue on Mon Sep 28 04:35:52 MST 2015
Take a look at a recent Errata Sheet:
"RESET.2 [...] CMSIS call NVIC_SystemReset() uses PERIPH_RST internally and is also non-functional."

[lpcware]

Content originally posted in LPCWare by PeterZos on Mon Sep 28 04:10:39 MST 2015
We made a workaround and connect P6_9 to reset circuit (it could also be directly to CPU's RESET pin - active low)

We also write HardFault handler:

__attribute__ ((section(".after_vectors")))
void HardFault_Handler(void)
{
while (1) {
    volatile uint32_t i;

    Chip_SCU_PinMuxSet(6, 9, SCU_MODE_FUNC0);
    Chip_GPIO_SetPinDIROutput(LPC_GPIO_PORT, 3, 5);
    for (i=0;1<1000000;i++)
    {
    }
    Chip_GPIO_SetPinState(LPC_GPIO_PORT, 3, 5, (bool) false);
    NVIC_SystemReset();
    }
}

after reset the pin P6_9 is defined as input pull-up enabled
so the cpu is not in reset state.

if the HardFault handler is triggered, pin P6_9 is set to output and pin state is set to low so the chip reset it self.

Regards
Peter Žos