lpc4088 with PHY dp83826

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lpc4088 with PHY dp83826

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kruftin
Contributor I

Hi, 

I try to work with Ethernet PHY from ti dp83826. Data transfer via MDC, MDIO - ok. But init process fail here:

//Check Link status

for (tout = EMAC_PHY_RESP_TOUT;tout >=0; tout--) {

regv = EMAC_Read_PHY(EMAC_PHY_REG_BMSR) ;

if(regv & EMAC_PHY_BMSR_LINK_ESTABLISHED) {

/* Link is on*/

break;

}

if(tout == 0) {

//time out

return (-1) ;

}

}

Why no link? What mean this link? If skip this step router doesn't see my device. 

PHY work as master, Clk correct. 

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kruftin
Contributor I

Ok, thank you for advice. I suppose that problem in my custom board. 

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Julián_AragónM
NXP TechSupport
NXP TechSupport

Hi @kruftin,

BMSR is the Basic Mode Status Register for your PHY device, and it seems to be a specific register, you will need to check it with the manufacturer at hand. Also, it seems you are using a custom board, could you please help me confirm this?

I recommend you refer to our LPC407x/8x LPCOpen software package with ethernet drivers, stack(LWIP) and examples which work well. I think the setup should be similar for the different PHYs. You may use the driver and stack: LPCOpen Software for LPC40XX | NXP Semiconductors.

Here are also some community posts you might find useful in your application: 

LPC4088 Ethernet Error - NXP Community

MII-MDIO clocking and control - NXP Community

Best regards, Julian

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