Hi,
The LPC8N04 contains a total of 8 kB on-chip static RAM memory configured as 256 x 2 x 4 x 32 bit. The SRAM supports byte-level access (BWE=8). Contains a 32 kB Flash memory of which 30 kB can be used as program and data memory. The flash is organized in 32 sectors of 1 kB. Each sector consists of 16 rows of 16 x 32-bit words. Also the flash is organized in 32 sectors of 1 kB. Each sector consists of 16 rows of 16 x 32-bit words.
The only AHB peripheral device on the LPC8N04 is the GPIO module. The APB peripheral area is 512 kB in size. Each peripheral is allocated 16 kB of space. All peripheral register addresses are 32-bit word aligned. Byte and half-word addressing is not possible. All reading and writing are done per full word.
Figure shows the memory and peripheral address space of the LPC8N04.

Have a great day,
Sol
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