Content originally posted in LPCWare by Grant.Edwards on Fri Apr 12 07:55:35 MST 2013Thanks for the reply.I've been a bit disappointed in the accuracy and completeness of the NXP docs, so it's good to have somewhere to find accurate info.
<pre> From memory, the flash-based parts will only boot from external sources if there is no valid code in internal flash, or the ISP pin (P2_7) is pulled low.</pre>AFAICT, the flash-based parts do pay attention to the boot-source configuration pins, so they will will boot from USART using the ISP protocol even when there is valid code in flash and P2_7 is high. What they apparently won't do is boot using the binary USART protocol as described by the User's manual.
<pre> You should still be able to load code into ram using the ISP (then jump to the appropriate location to execute it), it will just be slightly more work, and will need to be UUencoded</pre>Yes, that's not a problem -- I have an ISP utility I wrote which can upload, download, and run code in SRAM. It could be extended pretty easily to program flash as well. But, I don't really care about using the USART in ISP mode to program the LPC1857 eval board: I've got JTAG for that, and JTAG is a lot faster and more flexible.
The goal was to develop and test support for the binary USART boot mode which is what we were planning on using in production with the custom LPC1830 boards we're designing. OTOH, perhaps the NXP manuals are wrong about the LPC1830 also, and they are going to boot from USART using the ISP protocol. In that case: mission accomplished.
