Content originally posted in LPCWare by DF9DQ on Fri May 24 14:54:05 MST 2013The flow controller is the one who knows that the whole DMA transaction is over. However, most peripherals (including UART) cannot act as flow controller, because they cannot count the number of transfers done. So I see no reason to make UART1 the flow controller.
The concept of flow control is different from the peripheral request which triggers a transfer! In your case selecting peripheral-to-memory (DMA control) will let the UART request transfers whenever the FIFO reached the trigger level (burst request) or whenever a timeout occurs (single request). Since the DMA is the flow controller, it will stop the transaction and disable the DMA channel once the programmed number of transfers (i.e. UART characters) has been transferred.