Content originally posted in LPCWare by schisanoa on Mon Jan 20 07:48:46 MST 2014
Looking at the DS I see that UART 3 is assigned at too much PIN, U3TX and U3RX are mapped on:
P0.0 and P0.1
P0.2 and P0.3
P0.25 and P0.26
P4.28 and P4.29
in addition UART0 is also mapped on too much PIN,
P0.0 and P0.1
P0.2 and P0.3
I'm using Rev. 2 — 3 July 2013 datasheet downloaded from NXP web site, on the LPC4078 page 4 or 5 days ago.
Has someone an updated datasheet to share with me?
I would also advise the other user that PINMUX application for LPC40xx is affected from this problem, in order to avoid some trouble to someone.
Thanks
Alessio
PS: I've already check the ERRATA docs, but nothing is reported