Soft reset with spifi

[lpcware]

Content originally posted in LPCWare by charchar on Tue Nov 05 09:57:04 MST 2013
I have a platform that boots and executes code out of spifi and I'm having lots of trouble getting it to soft reset without hanging somewhere in the reset process. 

I understand that resetting the spifi device is important.  And I've tried this by issuing a "read reset" command before
initiating a reset through the RGU. 

#define SPIFI_CMD     (*(volatile uint32_t *)0x40003004)
#define SPIFI_STAT    (*(volatile uint32_t *)0x4000301c)

void softReset()
{
// reset spifi device
SPIFI_CMD =(0xffu << 24) | // opcode 0xFF (read reset) for winbond
(0x1 << 21) | // frame form indicating opcode only
(0x0 << 19) | // field form indicating all serial
(0); // datalen
while(SPIFI_STAT & 2); // wait for command to complete
  RGU_SoftReset(RGU_SIG_SPIFI); // reset spifi controller
delayus(100000); // wait for spifi device to reset
  RGU_SoftReset(RGU_SIG_CORE); // reset processor
}

None of this works though.  Has anyone had any luck with this?

thanks!

[lpcware]

Content originally posted in LPCWare by mc on Sat Mar 08 18:43:00 MST 2014
Hi Charchar,
In your below code you have used PIn P2_7, which is an ISP pin. In your code this pin is configured as an output pin. When Core Reset is applied LPC4300  Microcontroller resets itself.  After that LPC4300 samples this ISP pin. As you have used this pin in your software, pin may be low at power on and device can go into ISP mode. To avoid this situation, my recommendation is to add an external pull up resistor at this pin.

---

Quote:
int main(void)
{
volatile uint32_t d;

// set led muxes
scu_pinmux(0x4, 2, (MD_PLN | MD_EZI | MD_ZI | MD_EHS), FUNC1);
scu_pinmux(0x2, 7, (MD_PLN | MD_EZI | MD_ZI | MD_EHS), FUNC1);
scu_pinmux(0x2, 10, (MD_PLN | MD_EZI | MD_ZI | MD_EHS), FUNC1);

// flash led 3 times
LPC_SCT->CTRL_U |= 1<<2;
for (d=0; d<1000000; d++);
LPC_SCT->OUTPUT = 0x7;
for (d=0; d<1000000; d++);
LPC_SCT->OUTPUT = 0x0;
LPC_SCT->CTRL_U |= 1<<2;
for (d=0; d<1000000; d++);
LPC_SCT->OUTPUT = 0x7;
for (d=0; d<1000000; d++);
LPC_SCT->OUTPUT = 0x0;
LPC_SCT->CTRL_U |= 1<<2;
for (d=0; d<1000000; d++);
LPC_SCT->OUTPUT = 0x7;
for (d=0; d<1000000; d++);
LPC_SCT->OUTPUT = 0x0;

handleReset();
while(1);
}

---

[lpcware]

Content originally posted in LPCWare by charchar on Mon Nov 11 12:51:48 MST 2013
thanks-- I'll be getting some boards with rev C processors in a couple weeks--- it might shed some light on this as well.

[lpcware]

Content originally posted in LPCWare by noahk on Mon Nov 11 12:15:39 MST 2013
Hi charchar,

I'm stumped as well. At this point I'd advise using a logic analyzer or scope to identify if bootup after reset attempts to access the SPI Flash.That may help to pin down the problem.

Does reset work when you use parallel flash or other boot modes? Is this only a problem when booting from SPIFI?

Noah

[lpcware]

Content originally posted in LPCWare by charchar on Mon Nov 11 11:42:47 MST 2013
Hmmm.  I've tested the spifi_soft_reset code and it hangs after reset (same as my code). 

In my example, the target is "SPIFI 64 MB Debug". It uses the reset.sct scatter file.  The code gets copied to ram.  It's essentially the same as the code Noah sent.    

Other ideas---
There is nothing special about the schematic (I don't think) otherwise we wouldn't be able to erase and program the spifi device (which we can.) 

I'm stumped at this point.  But thanks for the help....

[lpcware]

Content originally posted in LPCWare by mc on Fri Nov 08 13:42:03 MST 2013

---

Quote: charchar
Hi Noah,
I added the 2 lines, and I simplified my program to make sure that there wasn't anything extraneous (USB, etc), and I added some LED flashing so I could witness the reset reliably--- and still no luck!  :( My winbond part is 25Q80BV.   thanks for keeping on this with me! 

My processor is somewhat ambiguously rev A-- for the revision marking, it has:
ESD1149ZRY
but I read that this is a marking mistake and that it's actually rev A. 

thanks!

---

Hi Charchar,
I have tested 25Q064 without any problem. Yes, ZRY is actually rev A version of the chip. There is a marking mistake. The boot ROM version in this chip should be 11.1.

[lpcware]

Content originally posted in LPCWare by noahk on Fri Nov 08 12:56:17 MST 2013
Hi charchar,

What configuration are you using? There are 4 projects in the uvproj file. It looks like you are only running from SRAM on one of them (Hitex FLASH). Is that the configuration you are using for SPIFI? If I look at SPIFI 64MB Debug, then all of the code is running out of SPIFI and the chip will crash when you attempt to reset SPIFI. You must allocate all the source that you are using from where you want to start resetting the SPIFI until you reset the chip in SRAM. Any code that you attempt to use after the SPIFI is reset from within the SPIFI area will crash the core.

The easiest way for you to debug this would be to use the example project I sent you. That is setup to do exactly what you want. Just modify the LED blinking logic for your board to confirm that it works.

Noah

[lpcware]

Content originally posted in LPCWare by charchar on Fri Nov 08 08:09:36 MST 2013
Hi Noah--- see attached. 

thanks!

[lpcware]

Content originally posted in LPCWare by noahk on Thu Nov 07 17:17:36 MST 2013
Hi charchar,

Can you also post your project files and scatter files. I want to make sure that the code is properly running out of SRAM. You can guarantee that it runs out of SRAM by stepping until the reset (write to 0x40053100). If it was not running in SRAM you would be unable to step to the last line of handleReset.

Also, please attempt to add a delay in right before the write to 0x40053100. Uncomment the delay that is already there.

Noah

[lpcware]

Content originally posted in LPCWare by charchar on Thu Nov 07 15:48:12 MST 2013
Hi Noah,
here's my code.  I see flash the led 3 times and then it stops. 

#include "lpc_types.h"
#include "lpc43xx_scu.h"
#include "lpc43xx.h"

#define SPIFI_CMD (*(volatile uint32_t *)0x40003004)
#define SPIFI_STAT (*(volatile uint32_t *)0x4000301c)

void handleReset()
{
volatile uint32_t d;

SPIFI_STAT = 0x10;
while(SPIFI_STAT & 0x10); // wait for reset to complete
// reset spifi device
SPIFI_CMD =(0xffu << 24) | // opcode 0xFF winbond reset
(0x1 << 21) | // frame form indicating opcode only
(0x0 << 19) | // field form indicating all serial
(0); // datalen
while(SPIFI_STAT & 2); // wait for command to complete
//for (d=0; d<500000; d++);
*(volatile int*)0x40053100 = 1;
}

int main(void)
{
volatile uint32_t d;

// set led muxes
    scu_pinmux(0x4, 2, (MD_PLN | MD_EZI | MD_ZI | MD_EHS), FUNC1);
  scu_pinmux(0x2, 7, (MD_PLN | MD_EZI | MD_ZI | MD_EHS), FUNC1);
   scu_pinmux(0x2, 10, (MD_PLN | MD_EZI | MD_ZI | MD_EHS), FUNC1);

// flash led 3 times
  LPC_SCT->CTRL_U |= 1<<2;
for (d=0; d<1000000; d++);
    LPC_SCT->OUTPUT = 0x7;
for (d=0; d<1000000; d++);
    LPC_SCT->OUTPUT = 0x0;
  LPC_SCT->CTRL_U |= 1<<2;
for (d=0; d<1000000; d++);
    LPC_SCT->OUTPUT = 0x7;
for (d=0; d<1000000; d++);
    LPC_SCT->OUTPUT = 0x0;
  LPC_SCT->CTRL_U |= 1<<2;
for (d=0; d<1000000; d++);
    LPC_SCT->OUTPUT = 0x7;
for (d=0; d<1000000; d++);
    LPC_SCT->OUTPUT = 0x0;


handleReset();
while(1);
}

[lpcware]

Content originally posted in LPCWare by noahk on Thu Nov 07 15:13:46 MST 2013
Hi charchar,

Can you post or PM me your code? Did you try my program? What development environment are you using?

Are you sure that the reset is executing? Perhaps use an additional LED and turn it off at program start, and turn it on right before doing RGU reset of the core. That way you can be sure that the reset is happening. I want to make sure of this b/c the most likely scenario is that the code is not executing from SRAM and is therefore crashing.

I looked at the Winbond part and it looks like the 0xff reset that you are doing is sufficient to get the boot to work after chip reset.

Noah

[lpcware]

Content originally posted in LPCWare by charchar on Thu Nov 07 14:44:56 MST 2013
Hi Noah,
I added the 2 lines, and I simplified my program to make sure that there wasn't anything extraneous (USB, etc), and I added some LED flashing so I could witness the reset reliably--- and still no luck!  :( My winbond part is 25Q80BV.   thanks for keeping on this with me! 

My processor is somewhat ambiguously rev A-- for the revision marking, it has:
ESD1149ZRY
but I read that this is a marking mistake and that it's actually rev A. 

thanks!

[lpcware]

Content originally posted in LPCWare by noahk on Thu Nov 07 12:33:36 MST 2013
Hi charchar,

Can you modify the program I sent you to blink some LEDs on your board, and then see if that works? The board I am using has revision A as well. The workaround of resetting the SPI Flash is necessary. Without resetting the SPI Flash the part will not boot after reset.

Another note is that you are going from Memory Mode to Command Mode in order to perform the SPI Flash reset. Also, try and add a delay after the spifi reset.

In your function:
void softReset()
{
SPIFI_STAT = 0x10; // reset memory mode                                ************* Add these 2 lines
while(SPIFI_STAT & 0x10); // wait for reset to complete

// reset spifi device
SPIFI_CMD =(0xffu << 24) | // opcode 0xFF (read reset) for winbond
(0x1 << 21) | // frame form indicating opcode only
(0x0 << 19) | // field form indicating all serial
(0); // datalen
while(SPIFI_STAT & 2); // wait for command to complete
delayus(100000); // wait for spifi device to reset                         ************* Add this line
RGU_SoftReset(RGU_SIG_SPIFI); // reset spifi controller
delayus(100000); // wait for spifi device to reset
RGU_SoftReset(RGU_SIG_CORE); // reset processor
}

What Winbond part are you using? The full model number would help me to look up those specs for you.

Noah

[lpcware]

Content originally posted in LPCWare by charchar on Thu Nov 07 07:45:01 MST 2013
Hi Noah,
Thanks!  I'm not sure what the difference is with our boards/processors.  Perhaps it's the flash (we're using Winbond) or the processor revision?

There's this:
http://www.nxp.com/documents/errata_sheet/ES_LPC43X0_A.pdf

My processor is revision A.  But the suggested workaround doesn't work for me. :( 

thanks!

[lpcware]

Content originally posted in LPCWare by noahk on Wed Nov 06 18:08:03 MST 2013
Hi charchar,

The board I tested this on was a Hitex LPC4350 Evaluation Board. Do you have access to this board? I have attached a small testcase. The reset is shown via GPIO using the USB LED. The program blinks quickly for a few seconds following by a few seconds of slow blinking followed by a soft reset. You can see that it continuously cycles the LED blinking.

This board uses a Spansion part (S25FL129P0XNFI01).

What is the NXP part # and the SPI Flash part # that you are using? Perhaps that will shed some light on the issue.

Noah

[lpcware]

Content originally posted in LPCWare by charchar on Tue Nov 05 22:35:05 MST 2013
Yeah, this is close to what I have.  I tried it and it still hangs.  I'm executing out of ram. 

thanks anyway.... :)

[lpcware]

Content originally posted in LPCWare by noahk on Tue Nov 05 19:43:56 MST 2013
Hi charchar,

Please make sure the softReset routine is in SRAM and not in SPIFI memory. If it is in SPIFI memory than the Cortex will crash as soon as you reset the SPIFI. Using your code (without the functions) I was able to replicate the failure when the softReset function is in SPIFI and I was able to successfully perform the reset when softReset is in SRAM.

Here is the code I used:
SPIFI_CMD =(0xffu << 24) | // opcode 0xFF (read reset) for winbond
(0x1 << 21) | // frame form indicating opcode only
(0x0 << 19) | // field form indicating all serial
(0); // datalen
while(SPIFI_STAT & 2); // wait for command to complete
*(volatile int*)0x40053100 = 1; // reset core

Let me know if that works for you,
Noah