Content originally posted in LPCWare by pkarrer_solcept on Mon Feb 17 08:32:18 MST 2014
Clock Setup: Clock source is the internal IRC.
When I leave the divider by 1, then SWD still works.
When I change the divider to 12 (eq. 1 MHz) then it get "Failed on connect: Ep(01). Target marked as not debuggable"
What's wrong?