Carlos Mendoza,
Thanks for your response.
Following my setup details
- LPCXpress IDE
- lpcopen_3_01_lpcxpresso_nxp_lpcxpresso_1837 example source
- IKALogic analyzer capture CLK, MISO, MOIS @1Mz (also used 5 & 10MHz sampling), Signals probed are shown below

- Working on LPC183x-Xplorer board.
I have shorted MISO line to MOSI line that is pin 5, 6 of J8 are shorted.
I have probed signal on logic change of the clock line, I see peculiar behavior of clock, Please give your comments

CLK is red line
Following is the serial console output, it shows transfer is passed as the MOSI & MISO are proper, but clock is not as expected/

Please give your comments why I am seeing the clock with 50% duty cycle?
I see clock is coming even though there is no data transmission. In the below scenario I have transmitted 6bytes, but the clock is keep on ticking??

Please give your inputs.
Thanks & Regards,
Vamshi G.