SPIFI boot issue

[lpcware]

Content originally posted in LPCWare by david_sh on Tue Nov 27 18:55:42 MST 2012
Hi, I have an issue about SPIFI boot.

our board spec:
MCU: LPC4350
SPI-FALSH: Micron N25Q128A13EF740E
BootSRC: 0x2(  OTP memory bank 3, word 0, means SPIFI booting)

I  can download the code to SPI-flash via JTAG in IAR EWARM environment, and the code can run well, but the board can't
boot without JTAG.  if I change the SPI-FLASH as Spansion S25FL064P used in Hitex LPC4350 EVB, the board boots well,
would you like to check whether BOOT_ROM can support N25Q128A13EF740E? if not, would you please to give the list which
LPC4350 BOOT_ROM can support SPI-FLASH? Thanks a lot.

Regards,
David

[lpcware]

Content originally posted in LPCWare by Mark Hughes on Thu Sep 18 23:15:16 MST 2014
OK, Thanks for clarifying.
Best Regards
Mark

[lpcware]

Content originally posted in LPCWare by mc on Thu Sep 18 19:32:00 MST 2014
Hi Mark,
NXP devices LPC18xx/LPC43xx boot from N25Q064A13EF640E when both devices are coming from cold boot (from reset). The problem exists only when this Micron device is in Quad XIP mode and LPC microcontroller gets reset (due external reset, WDT etc.). I this case both devices will be out of sync. The LPC micro reset can be a planned reset ( e.g. Core reset) or an unplanned reset ( e.g. WDT, external reset). In case of planned reset to resolve this issue customer can bring Micron QSPI device out of XIP before resetting LPC device. In case of unplanned reset an external circuit can be built to reset this Micron device.

[lpcware]

Content originally posted in LPCWare by Mark Hughes on Thu Sep 18 10:12:15 MST 2014
Hi ,

I have a query on the this Quad SPI part N25Q064A13EF640E .  This seems a suitable part for one of our projects but it is not supported by the NXP boot code.

Will it be supported at some point in the future ?

Thanks
Mark

[lpcware]

Content originally posted in LPCWare by Pacman on Sat Sep 21 14:40:07 MST 2013
That is very cool.
Does that mean I could actually ... uhm ... connect it directly to the SD/MMC card and get it to boot ? :)

[lpcware]

Content originally posted in LPCWare by mc on Sat Sep 21 14:04:43 MST 2013
Hi Paceman,
Yes, LPC43xx will boot in the best possible mode which is quad SPI in this case(this is QSPI device). At initialization user can switch mode from Quad to dual SPI or simply SPI

[lpcware]

Content originally posted in LPCWare by Pacman on Wed Sep 11 20:08:37 MST 2013
Technically, wouldn't it be possible to make the LPC43xx first try booting using Quad-SPI, then, if reading fails, try Dual-SPI, if reading fails, try SPI ?
I think this would be beneficial to a number of developers, especially if one of the multiplexed pins simply *must* be configured for another operation.
Dual or single would be better than nothing at all. -anyone agree ? ;)

[lpcware]

Content originally posted in LPCWare by mc on Thu Aug 15 18:15:48 MST 2013
Hi Andrei,
This device(S25FL064P) is supported to operate in its best supported mode, therefore it won't be possible to boot in dual mode.

[lpcware]

Content originally posted in LPCWare by Andrei.Bystrov on Thu Jul 25 02:53:59 MST 2013
Hi All,

I also have a question regarding the booting for LPC1850 chip from SPIFI. We are going to use the Pins P3_4 and P3_5 assigned for SPIFI SIO2 and SIO3 for different pin function (audio I2S - this is the only possible config for this function regarding these pins). So we will not have these pins available for SPIFI SIO2 and SIO3 functions. We know that we can boot from normal SPI (SSP0) boot mode but the pin functions will be assigned differently for SPI then for SPIFI and we will not have SPIFI mapped memory in this case.
The question is - Is it possible to boot from Quad SPI flash like for example Spansion S25FL064P used on Hitex boards without SIO2 and SIO3 connected to this chip - means in Dual SPIFI mode? We know that the dual SPIFI mode is supported for normal operations. Is Dual SPIFI mode supported for Booting in the ROM of LPC18x0 devices?


UPD: it looks like it is wrong place to put this question, I will move it to LPC18xx part of the forum.

[lpcware]

Content originally posted in LPCWare by user43 on Tue May 28 03:05:49 MST 2013

Regarding booting from SPIFI, in the current User manual UM10503 Rev. 1.6:

http://www.nxp.com/documents/user_manual/UM10503.pdf

In Table 12 (page 33), BOOT_SRC value 0010 is "Reserved".

However, in Table 17 (page 37), BOOT_SRC 0010 is shown as "SPIFI".

Which is correct?

Is it possible to boot from SPIFI via OTP settings?

[lpcware]

Content originally posted in LPCWare by gregd on Mon Mar 04 07:03:11 MST 2013
Also, does this new firmware version solve the following issue which is listed in the Errata for the LPC4350:  "3.10 SPIFI.1: The ROM driver does not properly re-initialize the external serial flash device".  I know this is a repeat question but I never heard an answer from the original question posted 11/28/2012.

[lpcware]

Content originally posted in LPCWare by Pacman on Mon Mar 04 04:23:45 MST 2013
Is there a way we can see whether the microcontroller has the new boot ROM; eg. a date code or serial number ?

[lpcware]

Content originally posted in LPCWare by gregd on Wed Nov 28 16:36:22 MST 2012
Will the new boot ROM version also fix the SPIFI boot issue noted in the Errata for the LPC4350 where the boot will fail if the SPI flash chip is left in certain modes? 

Thanks,
Greg Dunn

[lpcware]

Content originally posted in LPCWare by nxp21346 on Wed Nov 28 14:48:49 MST 2012
Hello,

We have found that boot ROM version 11.1 does not support Micron N25Q064A and likely does not support N25Q128A either. There is a new version of the boot ROM, 11.2, that should be available on silicon within a few months that should support booting from these Micron N25QxxxA parts. We have updated the User Manual and the update will release next week. The updated UM now differentiates properly between tested to read/write and tested to boot parts.

-Dave @ NXP