SPIFI CACHE LIMIT REGISTER

[giannigrondona]

Hi 

I use an LPC54680 microprocessor and I don't know how SPIFI cache register works. I use SPIFI for accesses to the serial flash where stays  the code

I would like to increase size of cache, but I don't know how. The default value after reset  of  SPIFI CACHE REGISTER is 0x8000000 but I don't know that meaning. My serial flash memory memory start at 0x10000000.

Best Regards

Giovanni 

[jeremyzhou]

Hi Giovanni Grondona,

Thank you for your interest in NXP Semiconductor products and 

the opportunity to serve you.

The assignment area of SPIFI flash is 0x1000 0000 to 0x17FF FFFF, in another word, the size of are is 0x0800 0000,

If the value of SPIFI cache limit register is 0x0800 0000 which means any access to SPIFI flash are cacheable.

Hope this is clear.

Have a great day,
TIC

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