SPI Transmission Data Corruption on LPC1768 Using SSP

[AkshayNaik1907]

Hi,

I am working with the LPC1768 SSP peripheral in SPI master-slave mode. I am facing an issue with transmitted data when using ISR-based SPI transfers. Here’s the behavior I observe:

Expected behavior:

• MOSI should send: 11 22 33 44 55 66 77 88 99

• MISO should receive: 01 12 23 34 56 67 78 89
  (The first byte from slave is 01 since the slave initially has no data.)

Observed behavior:

• When I run the code continuously, MOSI is transmitted incorrectly in some cases. For example, the last bytes appear corrupted or repeated, and only 23 bytes are sent instead of 32. and some bytes are meant to sent 0x55 but its transmitting 0x00.

• When I put breakpoints and step through, the data is transmitted correctly.

Setup:

• Using SSP0 on LPC1768

• Interrupts enabled for TX and RX: SSP0_IMSC = (1<<2) | (1<<3)

• Data width: 8-bit

• ISR-based, polling-free transfer

Questions:

1. Has anyone seen similar SPI transmission issues on LPC1768 where data gets corrupted or incomplete during continuous ISR-based transfers? Could this be related to FIFO timing, clock phase settings, or ISR handling?

2. Is there an errata or known issue with LPC1768 SSP that could cause this behavior?

3. Could this also be related to the board itself or how it handles SPI signals?

I have attached the ISR code file.

Thank you

[Alice_Yang · Accepted solution]

Hi @AkshayNaik1907 

Thanks for your question.

1)What SPI slave device is connected to the LPC1768?
2)Please use a logic analyzer to measure and check whether the signals are correct.
3)Additionally, please try lowering the SPI speed to see if it improves functionality.

Thank you.

BR

Alice