Ram is not enough, could I use extern SDRAM as ram?and How?

[lpcware]

Content originally posted in LPCWare by lifejoker on Thu May 08 00:22:01 MST 2014
To any one who could help,
I am using IAR+LPC4357+ external SDRAM + LWIP+UFFS.
My ram is not enough, i need to use external SDRAM as RAM . The code i am using was download from LPCOPEN, external SDRAM is initialized in Board_SystemInit.

/* Set up and initialize hardware prior to call to main */
void Board_SystemInit(void)
{
/* Setup system clocking and memory. This is done early to allow the
   application and tools to clear memory and use scatter loading to
   external memory. */
Board_SetupMuxing();
Board_SetupClocking();
Board_SetupExtMemory();
}

I tried change _RAM_start__ and RAM_end__  in  lpc4357_m4.icf
define symbol __ICFEDIT_region_RAM_start__ =
define symbol __ICFEDIT_region_RAM_end__   =

which are changed to the address of external SDRAM(0X28000000), but when i download to device, it goes to HardFault_Handler.
I guess it is because SDRAM doesn't work at the beginning. but what should I do with it? or should I use assembly code to initialize SDRAM first ?if then is there any code to refer to ?
Thanks so much.

[lpcware]

Content originally posted in LPCWare by lifejoker on Wed May 21 23:14:21 MST 2014
it seems work now
Thanks again . :D

[lpcware]

Content originally posted in LPCWare by lifejoker on Thu May 15 02:11:51 MST 2014
hi,bavarian,thanks so much about your reply.

Refer to the example and what you said, I changed the configuration about my .icf file as blow:

/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x1A000000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_ROM_start__ = 0x1A000114;
define symbol __ICFEDIT_region_ROM_end__   = 0x1A07FFFF;
define symbol __ICFEDIT_region_RAM_start__ = 0x28000100;
define symbol __ICFEDIT_region_RAM_end__   = 0x29FFFFFF;
define symbol __ICFEDIT_region_IRAM_start__ = 0x10080000;
define symbol __ICFEDIT_region_IRAM_end__   = 0x10089FFF;

/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x800;
define symbol __ICFEDIT_size_heap__   = 0x5000;
/**** End of ICF editor section. ###ICF###*/

/********** Flash BankB Region **********/
define symbol __ICFEDIT_region_ROM_BANKB_start__ = 0x1B000000;
define symbol __ICFEDIT_region_ROM_BANKB_end__   = 0x1B07FFFF;

/********** Local SRAM Region **********/
define symbol LOCAL_SRAM_start__    = 0x10080000;
define symbol LOCAL_SRAM_end__      = 0x10089FFF;

/********** AHB SRAM Region 1 **********/
define symbol AHB_SRAM1_start__     = 0x20000000;
define symbol AHB_SRAM1_end__       = 0x20007FFF;

/********** AHB SRAM Region 2 **********/
define symbol AHB_SRAM2_start__     = 0x20008000;
define symbol AHB_SRAM2_end__       = 0x2000BFFF;

/********* ETB/AHB SRAM Region *********/
define symbol ETB_SRAM_start__      = 0x2000C000;
define symbol ETB_SRAM_end__        = 0x2000FFFF;

/********* CRP REGION *********/
define symbol __CRP_start__   = 0x1A0002FC;
define symbol __CRP_end__     = 0x1A0002FF;

/********* EEPROM REGION *********/
define symbol __EE_start__   = 0x20040000;
define symbol __EE_end__     = 0x20044000;

/********* EMC SDRAM Region *********/
/* 32Mbyte SDRAM at DYCS0 */
/* 0x100 are taken away at the beginning for the interrupt vectors */
define symbol EMC_SDRAM0_start__    = 0x28000100;
define symbol EMC_SDRAM0_end__      = 0x29FFFFFF;

/*define symbol SDRAM_vectors_start   = 0x28000000;
export symbol SDRAM_vectors_start;*/

define memory mem with size = 4G;
define region ROM_region           = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__] - mem:[from  __CRP_start__ to __CRP_end__];
define region ROM_BANKB_region     = mem:[from __ICFEDIT_region_ROM_BANKB_start__ to __ICFEDIT_region_ROM_BANKB_end__];
define region RAM_region           = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
define region IRAM_region          = mem:[from __ICFEDIT_region_IRAM_start__   to __ICFEDIT_region_IRAM_end__];
define region LOCAL_SRAM_region    = mem:[from LOCAL_SRAM_start__             to LOCAL_SRAM_end__];
/*define region PD_LOCAL_SRAM_region = mem:[from PD_LOCAL_SRAM_start__          to PD_LOCAL_SRAM_end__];*/
define region AHB_SRAM1_region     = mem:[from AHB_SRAM1_start__              to AHB_SRAM1_end__];
define region AHB_SRAM2_region     = mem:[from AHB_SRAM2_start__              to AHB_SRAM2_end__];
define region ETB_SRAM_region      = mem:[from ETB_SRAM_start__               to ETB_SRAM_end__];
define region CRP_region           = mem:[from  __CRP_start__ to __CRP_end__];
define region EEPROM_region        = mem:[from  __EE_start__ to __EE_end__];
define region SDRAM_region         = mem:[from EMC_SDRAM0_start__             to EMC_SDRAM0_end__];

define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };

/*initialize by copy { readwrite };*/
initialize by copy { readonly, readwrite };
do not initialize  { section .noinit };
do not initialize  { section .eeprom };

place at address mem:__ICFEDIT_intvec_start__ { section .intvec };
/*place at address mem:SDRAM_vectors_start { section .vectors_SDRAM };*/

place in LOCAL_SRAM_region       { section .local_sram };
place in PD_LOCAL_SRAM_region    { section .pd_local_sram };
place at end of AHB_SRAM1_region { section .shared_data};
place in AHB_SRAM1_region        { section .ahb_sram1 };
place in AHB_SRAM2_region        { section .ahb_sram2 };
place in ETB_SRAM_region         { section .etb_sram };
place in EEPROM_region           { section .eeprom };
place in SDRAM_region            { section .emc_sdram };

place at start of ROM_BANKB_region  { section .M0_CODE };

place in CRP_region              { section .crp };

place in ROM_region              { readonly };
place in RAM_region              { readwrite};
place in IRAM_region             { block CSTACK, block HEAP };

and also changed the __vector_table[ ] llike what you did in  project IAR_LPC4300_SDRAM_CONFIG.
I had one problem when I debug, in function  SystemSetupClocking() , when I tired to use Chip_Clock_GetBaseClocktHz() to get CLK_BASE_MX clock, i found the base clock is power off.
I didnot what happened. do you have any idea what happened?

Looking forward to your reply.

Thanks so much .

[lpcware]

Content originally posted in LPCWare by bavarian on Wed May 14 08:13:49 MST 2014
Hello,

of course it is possible with IAR EWARM to declare different memory areas and provide them to the linker as "available".
The only problem is:  it's not as easy as with Keil uVision  

I attached some files coming from a LPC4350 project with the following configuration:

[list]
  [*]  Tested with EWARM 6.70
  [*]  It uses a C startup file instead of the assembler file
  [*]  It is a FreeRTOS project, that's why some of the IRQ handler definitions are non-standard
  [*]  Software starts running from SPIFI and sets up the chip + SDRAM interface
  [*]  The code from main() onwards gets relocated to SDRAM and executed there. The code for doing this is created by the linker
  [*]  Interrupt vector table exists in SPIFI and in SDRAM, at the time the code execution from SDRAM starts the VTOR setting is changed  (see main() )
  [*]  The linker script declares a RAM area at the address of the SDRAM (0x28000100, some space for vector table has been reserved here) and uses it later on for placement of RW data

place in RAM_region   { readwrite };

  [*]  The relocation from SPIFI into this RAM area is caused by the instruction 

initialize by copy { readonly, readwrite };

  [*]  The startup environment is protected against relocation with the following instruction, so the linker only relocates code from main() onwards

do not initialize  { section .noinit }; 

  [*]  The stack is in the internal SRAM area called IRAM, after the SDRAM has been set up, the stackpointer could also be set to use a meory area defined in the SDRAM address range
[/list]



There are various possibilities to configure the memory areas of the LPC4300, there are as welly many ways to do this in the compiler tool, so it is worthwhile to spend some time to understand the IAR linker configuration ... or simply use Keil uVision        To be honest, for a more complicated memory setup the linker script for uVision is not plug & play, also there you need to learn it first.

Regards,
NXP Support Team.

[lpcware]

Content originally posted in LPCWare by lifejoker on Mon May 12 23:23:44 MST 2014
hi,mc, thank you for helping.
I download the project you mentioned .I feel the way to use SDRAM in this project is very similiar to the way I used.The system start up from IRAM1(start 0x10000000, size :0x10000).
The variables placed in external SDRAM must be declared either as __no_init or as const , for example :
#pragma location="GUI_RAM"
  static __no_init U32 _aMemory[GUI_NUMBYTES / 4];
Since I need bige enough space for thread, and parameters defined for thread, i hope i could use external SDRAM as ram, no matter what parameters defined , i dont need to care about the address in SDRAM.such as
static U32 _aMemory[GUI_NUMBYTES/4], It could be in SDRAM , but i dont need to place it somewhere in SDRAM by myself.
What should I do ?

Thanks agiain.

[lpcware]

Content originally posted in LPCWare by mc on Fri May 09 10:24:00 MST 2014
Hi Lifejoker,
Before execution of main function the startup code is executed to take care of all linker allocation need during the run time. This startup code is usually part of C standard library. Most of the cases I see this function in the crt0.O object file.  To place variable in the SDRAM you will have to initialize SDRAM during this initializaton.  The IAR C startup file calls a function __low_level_init().  In this function you will have to call clock  setup function and after that SDRAM initialization function. You can take below BSP as an example. It in not based on LPCopen,it is based on old drivers,however it  shows you basic concept.
http://www.lpcware.com/content/nxpfile/emwin-522-board-support-package-ea1788-board

Please note that there is a  limitation imposed by IAR,  that is, The variables placed in external SDRAM must be declared either as __no_init or as const.

Hope it will help

[lpcware]

Content originally posted in LPCWare by lifejoker on Thu May 08 22:24:04 MST 2014
Hi, I am sorry , I forgot to write it down.
It is MCB4357, i am using IAR .
Thanks

[lpcware]

Content originally posted in LPCWare by embd02161991 on Thu May 08 14:54:24 MST 2014
Hi,

Can you tell me what board your using ?

Thanks,
NXP Technical Support