The CAN controller is configured correctly — bit timing is set, it enters normal mode, and incoming frames are visible . Registers CANxRFS, CANxRID, and CANxRDA are updated correctly when a frame is received. I am implementing an interrupt-driven CAN driver on LPC1768 with a baud rate of 500 kbps.
However, the RBS (Receive Buffer Status) bit does not get set in either CANxSR or CANxGSR, even though a complete CAN frame is received. I am not setting the RRB bit in CANxCMR to release the receive buffer, so the RBS bit should remain set until the buffer is released.
Could you please explain why the RBS bit might not set, or if there are any known issues with LPC1768 CAN in this setup?
Thank you for your support.
Hi @Nisarga
Based on your description,
I think you can check AFMR register.
I think If acceptance filtering is bypassed, messages go directly into the Receive Registers (CANxRFS/RID/RDA/RDB) without updating RBS.
You can check it.
BR
Harry