Problem with CRC engine in LPC11U67 Controller

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Problem with CRC engine in LPC11U67 Controller

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by vdlsaranya on Thu Mar 10 21:19:15 MST 2016
Hi everyone,

                 we are using LPC11u67 microcontroller. we want to calculate CRC of a data packet. But the CRC given by the controller doesn't matches with the already calculated CRC for that packet.

Before using CRC engine, steps we had done are

1. Enabling the clock to it 28 bit of SYSAHBCLKCTRL register
2. Selection of CRC mode by placing 0x00 in CRC mode register. (CRC-CCITT polynomial, no bit order reversal no 1's complement)
3. Setting the seed value as 0xFFFF in CRC seed register

And loaded the packet to write register and checking the sum.

when we gave single byte, the following are the results we have obtained

(Byte value)               (Actual CRC)                             (CRC from controller)
0x00                          0x0000                                       0x84c0
0x01                          0x1021                                       0xF274

we have tried all the combinations by changing the mode and seed values, but any one of combination is not giving exact CRC for all the data we are giving to it.

Please Share if anything can be done to get it working properly.

Below is attachment regarding the code for CRC verification.

Thanks & Regards,
Saranya VDL.
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lpcware
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Content originally posted in LPCWare by vdlsaranya on Tue Mar 15 01:42:01 MST 2016
Hi every one,

     Firstly thanks for the help.
     In LPC 11U67 we have changed the structure of CRC_engine from the following

typedef struct {                                    /*!< CRC Structure                                                         */
  __IO uint32_t  MODE;                              /*!< CRC mode register                                                     */
  __IO uint32_t  SEED;                              /*!< CRC seed register                                                     */
 
  union {
    __O  uint32_t  WR_DATA;                         /*!< CRC data register                                                     */
    __I  uint32_t  SUM;                             /*!< CRC checksum register                                                 */
  };
} LPC_CRC_Type;

     to the following strucure

typedef struct
{
__IO uint32_t MODE;
__IO uint32_t SEED;
union {
__I uint32_t SUM;
__O uint32_t WR_DATA_DWORD;
__O uint16_t WR_DATA_WORD;
uint16_t RESERVED_WORD;
__O uint8_t WR_DATA_BYTE;
uint8_t RESERVED_BYTE[3];
};
}LPC_CRC_Type;

        So, our issue got resolved. We can now give byte string to get CRC by giving input using WR_DATA_BYTE register .

Thanks & Regards,
Saranya VDL.
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lpcware
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Content originally posted in LPCWare by starblue on Mon Mar 14 00:41:13 MST 2016

Quote: vdlsaranya
And as starblue said data input of 8 bit has to be written in LPC_WRData8, but in LPC11U67 there is no such register to differentiate the data input.

I've not tested it on real hardware, but in lpcopen_2_06_lpcxpresso_nxp_lpcxpresso_11u68 there is
lpc_chip_11u6x/inc/crc_11u6x.h:__O     uint8_t     WRDATA8;/*!< CRC Data Register: write size 8-bit*/

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lpcware
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Content originally posted in LPCWare by vdlsaranya on Sun Mar 13 20:51:06 MST 2016
Hi,

    As vtw.433e wrote that need 32 bit data input to get 32 bit CRC, but we are using CRC_CCITT which gives a 16 bit CRC, so data input of 32 bit is not necessary as far as my knowledge is concerned.
   And as starblue said data input of 8 bit has to be written in LPC_WRData8, but in LPC11U67 there is no such register to differentiate the data input.
  
   User manual says that this controller supports 8,16 and 32 bit access as mentioned in the attached below.

   And when we gave 32 bit value it is giving correct CRC, but we want byte access to that. How can i get that.
   Please share if anything is there to solve our Issue.

Thanks & Regards,
Saranya VDL.
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lpcware
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Content originally posted in LPCWare by starblue on Sat Mar 12 04:33:43 MST 2016

Quote: vdlsaranya
As you have told that there is difference between 8-bit, 16-bit, or 32-bit access. But in the user manual of LPC11U67 microcontroller, there is no such register to differentiate the input given to CRC engine.

You don't need to configure it beforehand, as it is done for each access to the WR_DATA register, see the documentation for WR_DATA.

Quote:
Then, how can we get the CRC for packet with byte count which is not multiple of 4 (32 bit register accessing).

As far as I understand you need to write bytes to LPC_CRC->WRDATA8.



Quote: vtw.433e
I thought that for an n-bit CRC, the data length had to be a multiple of n bits.


No, in mathematical theory it can be any number of bits. Implementations usually support at least any number of bytes.
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lpcware
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Content originally posted in LPCWare by vtw.433e on Sat Mar 12 03:40:25 MST 2016
I thought that for an n-bit CRC, the data length had to be a multiple of n bits. That is if you have a 32 bit CRC, your input data length must also be a multiple of 32bits. So by definition you cannot do what you are trying to do (add 8 bits at a time).
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lpcware
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Content originally posted in LPCWare by vdlsaranya on Sat Mar 12 03:18:17 MST 2016
Hi,

     As you have told that there is difference between 8-bit, 16-bit, or 32-bit access. But in the user manual of LPC11U67 microcontroller, there is no such register to differentiate the input given to CRC engine.

    There is only one register given to differentiate the CRC engine mode attached below.

    we have tried the cases what you have told earlier. It is considering the byte value given to it as 32 bit with all other bits as Zero.
    Then, how can we get the CRC for packet with byte count which is not multiple of 4 (32 bit register accessing).

    Please share if anything can be done else to get the CRC by giving it byte values not 32 bit values.

Thanks & Regards,
Saranya VDL.
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lpcware
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Content originally posted in LPCWare by DF9DQ on Fri Mar 11 05:59:37 MST 2016
When writing to WR_DATA there is a difference between 8-bit, 16-bit, or 32-bit access!

You are using 32-bit access, so your result is actually the checksum after four byte writes. Example:
0x01 -> 0xF1D1, 0x00 -> 0x2E3E, 0x00 -> 0xFBAC, 0x00 -> 0xF274

Check if your header file defines an alternate name for WR_DATA to allow 8-bit wide access.
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