New LPCXpresso 54102 project with M0 core as master and M4 as slave.

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New LPCXpresso 54102 project with M0 core as master and M4 as slave.

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by andypevy on Thu Apr 09 06:01:59 MST 2015
Hi,

     I am trying to set up a new project where I have the M0 core running as the master
that will be driving all my measuring devices, and the M4 core processing any of the data
that meets certain criteria.

I can find demo projects where the M0 is the slave, but not the M4.

Is there any guidance as to how to set this up please ?.

I know the M4 is responsible for booting the device(s) when it initially starts, and
will then start the M0, but all the example code then has the M0 as slave and not the M4.

Also, is there any news on the arrival of the 54102 please ??.

Thanks,
Andy Pevy
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by nerd herd on Tue Apr 14 07:34:33 MST 2015
Hi andypevy,

No, I do not think that FreeRTOS has been ported onto the Cortex-M0+ core of the LPC5410x. The fact that the Cortex-M4 core is master should not conflict with your goal. You can try to copy the FreeRTOS code for the Cortex-M4 core onto the Cortex-M0+ project and fix any possible core dependencies.
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by andypevy on Sun Apr 12 06:46:49 MST 2015
Hi,

    I understand the concept of Master/Slave.

There is a demo blinky project that uses freertos and has the rtos
running on the M4 core.

I want to have the rtos running on the M0 to collect data from sensors
and have the M4 used as a number cruncher to process that data if
deemed necessary by the M0.

I am working in a very low power situation and I do not have the power
budget to justify having the M4 consuming 100uA/MHz when the M0 only
uses 55 uA/MHz.

I can run the M0 at a low clock rate and switch to a faster rate when I need
the M4 to crunch numbers for me.

Has anybody run FreeRTOS on the M0 in this way ?.

Thanks for the arrival update.

Andy Pevy

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by nerd herd on Thu Apr 09 10:29:04 MST 2015
Hi andypevy,

Whether a core is master or slave only indicates which core is initialized first and should not affect the application you are striving to achieve. Is there any limitation you are worried the Cortex-M0 core will have by being the slave?

CSP packages should be available end of April and LQFP should arrive around end of May.
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