Lpc4357 Can

[Newton829]

Hello All,

   In the user manual of LPC4357,under CAN section .

There is a CAN_CLK register, which specifies the devision of Peripheral clock.

Similar under CAN_BT ther3 are bits for baud rate prescaler.

Can some one please explain me are these register same? As the seems to do the same job or do they serve any different purpose

2.For the calculation of Timming parameters of Can do I need to the total of both the devisor?

Thank you

[xiangjun_rong · Accepted solution]

Hi,

For the CAN bus driving clock of LPC43xx, I suppose that this is the CAN clock divider map for CAN0 module:

                                   Divider1                                                     Divider2

BASE_APB3_CLK---[DIVVAL bits in CAN_CLK register]---[BRP bits in C_CAN0_BT register]--Tq clock

For the Divider1:

xiangjun_rong_1-1669788072266.png

For the Divider2

xiangjun_rong_0-1669787948905.png

For the BASE_APB3_CLK source selection, pls refer to

xiangjun_rong_2-1669788394599.png

Hope it can help you

BR

XiangJun Rong