LPC812: Flash access cycles

[karthikvenkates]

Hi,

There is an option in LPC812 to select the number of System clock cycles taken for accessing Flash memory. We can select 1 cycle or 2 cycles.

My question is, why we are given this option ? Is it just a simple feature that lets us work on two different speeds or is there any specific reason for this option ? Why not 3 cycles or 4 cycles ?

[kerryzhou]

Hello Karthik venkatesh,

   I think our lpc812 code can answer your questions clearly:

typedef enum {
    FLASHTIM_20MHZ_CPU = 0,        /*!< Flash accesses use 1 CPU clocks. Use for up to 20 MHz CPU clock*/
    FLASHTIM_30MHZ_CPU = 1,     /*!< Flash accesses use 2 CPU clocks. Use for up to 30 MHz CPU clock*/
} FMC_FLASHTIM_T;

/**
 * @brief    Set FLASH memory access time in clocks
 * @param    clks    : Clock cycles for FLASH access
 * @return    Nothing
 * @note    For CPU speed up to 20MHz, use a value of 0. For up to 30MHz, use
 *            a value of 1
 */
STATIC INLINE void Chip_FMC_SetFLASHAccess(FMC_FLASHTIM_T clks)
{
    uint32_t tmp = LPC_FMC->FLASHCFG & (~((0x3)|FMC_FLASHCFG_RESERVED));

    /* Don't alter upper bits */
    LPC_FMC->FLASHCFG = tmp | clks;
}

You just need to know, when the cpu clock is below20Mhz, you can use FLASHTIM =0, when the clock is up 20Mhz, and below 30Mhz, you need to use the FLASHTIM=1.

Wish it helps you!

Have a great day,
Kerry

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